info.buf_len = ICE_DCF_AQ_BUF_SZ;
info.msg_buf = hw->arq_buf;
- while (pending) {
+ while (pending && !hw->resetting) {
ret = iavf_clean_arq_element(&hw->avf, &info, &pending);
if (ret != IAVF_SUCCESS)
break;
ice_dcf_handle_vsi_update_event(struct ice_dcf_hw *hw)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(hw->eth_dev);
- int err = 0;
+ int i = 0;
+ int err = -1;
rte_spinlock_lock(&hw->vc_cmd_send_lock);
- rte_intr_disable(&pci_dev->intr_handle);
+ rte_intr_disable(pci_dev->intr_handle);
ice_dcf_disable_irq0(hw);
- if (ice_dcf_get_vf_resource(hw) || ice_dcf_get_vf_vsi_map(hw) < 0)
- err = -1;
+ for (;;) {
+ if (ice_dcf_get_vf_resource(hw) == 0 &&
+ ice_dcf_get_vf_vsi_map(hw) >= 0) {
+ err = 0;
+ break;
+ }
- rte_intr_enable(&pci_dev->intr_handle);
+ if (++i >= ICE_DCF_ARQ_MAX_RETRIES)
+ break;
+
+ rte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);
+ }
+
+ rte_intr_enable(pci_dev->intr_handle);
ice_dcf_enable_irq0(hw);
rte_spinlock_unlock(&hw->vc_cmd_send_lock);
return 0;
}
+static int
+dcf_get_vlan_offload_caps_v2(struct ice_dcf_hw *hw)
+{
+ struct virtchnl_vlan_caps vlan_v2_caps;
+ struct dcf_virtchnl_cmd args;
+ int ret;
+
+ memset(&args, 0, sizeof(args));
+ args.v_op = VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS;
+ args.rsp_msgbuf = (uint8_t *)&vlan_v2_caps;
+ args.rsp_buflen = sizeof(vlan_v2_caps);
+
+ ret = ice_dcf_execute_virtchnl_cmd(hw, &args);
+ if (ret) {
+ PMD_DRV_LOG(ERR,
+ "Failed to execute command of VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS");
+ return ret;
+ }
+
+ rte_memcpy(&hw->vlan_v2_caps, &vlan_v2_caps, sizeof(vlan_v2_caps));
+ return 0;
+}
+
int
ice_dcf_init_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
int ret, size;
+ hw->resetting = false;
+
hw->avf.hw_addr = pci_dev->mem_resource[0].addr;
hw->avf.back = hw;
}
hw->eth_dev = eth_dev;
- rte_intr_callback_register(&pci_dev->intr_handle,
+ rte_intr_callback_register(pci_dev->intr_handle,
ice_dcf_dev_interrupt_handler, hw);
- rte_intr_enable(&pci_dev->intr_handle);
+ rte_intr_enable(pci_dev->intr_handle);
ice_dcf_enable_irq0(hw);
+ if ((hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) &&
+ dcf_get_vlan_offload_caps_v2(hw))
+ goto err_rss;
+
return 0;
err_rss:
ice_dcf_uninit_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
- struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
+ struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
if (hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS)
if (hw->tm_conf.committed) {
hw->ets_config = NULL;
}
-static int
+int
ice_dcf_configure_rss_key(struct ice_dcf_hw *hw)
{
struct virtchnl_rss_key *rss_key;
return err;
}
-static int
+int
ice_dcf_configure_rss_lut(struct ice_dcf_hw *hw)
{
struct virtchnl_rss_lut *rss_lut;
PMD_DRV_LOG(DEBUG, "RSS is not supported");
return -ENOTSUP;
}
- if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
+ if (dev->data->dev_conf.rxmode.mq_mode != RTE_ETH_MQ_RX_RSS) {
PMD_DRV_LOG(WARNING, "RSS is enabled by PF by default");
/* set all lut items to default queue */
memset(hw->rss_lut, 0, hw->vf_res->rss_lut_size);
j = 0;
hw->rss_lut[i] = j;
}
- /* send virtchnnl ops to configure rss*/
+ /* send virtchnl ops to configure RSS */
ret = ice_dcf_configure_rss_lut(hw);
if (ret)
return ret;
}
int
-ice_dcf_add_del_all_mac_addr(struct ice_dcf_hw *hw, bool add)
+ice_dcf_add_del_all_mac_addr(struct ice_dcf_hw *hw,
+ struct rte_ether_addr *addr,
+ bool add, uint8_t type)
{
struct virtchnl_ether_addr_list *list;
- struct rte_ether_addr *addr;
struct dcf_virtchnl_cmd args;
int len, err = 0;
}
len = sizeof(struct virtchnl_ether_addr_list);
- addr = hw->eth_dev->data->mac_addrs;
len += sizeof(struct virtchnl_ether_addr);
list = rte_zmalloc(NULL, len, 0);
rte_memcpy(list->list[0].addr, addr->addr_bytes,
sizeof(addr->addr_bytes));
+
PMD_DRV_LOG(DEBUG, "add/rm mac:" RTE_ETHER_ADDR_PRT_FMT,
RTE_ETHER_ADDR_BYTES(addr));
-
+ list->list[0].type = type;
list->vsi_id = hw->vsi_res->vsi_id;
list->num_elements = 1;