net/sfc: fix RSS hash offload if queue action is used
[dpdk.git] / drivers / net / ice / ice_ethdev.c
index c42581e..d8ce09d 100644 (file)
 /* devargs */
 #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support"
 #define ICE_PIPELINE_MODE_SUPPORT_ARG  "pipeline-mode-support"
-#define ICE_FLOW_MARK_SUPPORT_ARG      "flow-mark-support"
 #define ICE_PROTO_XTR_ARG         "proto_xtr"
 
 static const char * const ice_valid_args[] = {
        ICE_SAFE_MODE_SUPPORT_ARG,
        ICE_PIPELINE_MODE_SUPPORT_ARG,
-       ICE_FLOW_MARK_SUPPORT_ARG,
        ICE_PROTO_XTR_ARG,
        NULL
 };
@@ -79,7 +77,7 @@ static struct proto_xtr_ol_flag ice_proto_xtr_ol_flag_params[] = {
 static int ice_dev_configure(struct rte_eth_dev *dev);
 static int ice_dev_start(struct rte_eth_dev *dev);
 static void ice_dev_stop(struct rte_eth_dev *dev);
-static void ice_dev_close(struct rte_eth_dev *dev);
+static int ice_dev_close(struct rte_eth_dev *dev);
 static int ice_dev_reset(struct rte_eth_dev *dev);
 static int ice_dev_info_get(struct rte_eth_dev *dev,
                            struct rte_eth_dev_info *dev_info);
@@ -143,6 +141,11 @@ static int ice_dev_udp_tunnel_port_del(struct rte_eth_dev *dev,
                        struct rte_eth_udp_tunnel *udp_tunnel);
 
 static const struct rte_pci_id pci_id_ice_map[] = {
+       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_BACKPLANE) },
+       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_SFP) },
+       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_10G_BASE_T) },
+       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_1GBE) },
+       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_QSFP) },
        { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_BACKPLANE) },
        { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_QSFP) },
        { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_SFP) },
@@ -154,11 +157,10 @@ static const struct rte_pci_id pci_id_ice_map[] = {
        { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SFP) },
        { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_10G_BASE_T) },
        { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SGMII) },
-       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_BACKPLANE) },
-       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_SFP) },
-       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_10G_BASE_T) },
-       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_1GBE) },
-       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_QSFP) },
+       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822L_BACKPLANE) },
+       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822L_SFP) },
+       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822L_10G_BASE_T) },
+       { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822L_SGMII) },
        { .vendor_id = 0, /* sentinel */ },
 };
 
@@ -1751,53 +1753,6 @@ ice_pf_setup(struct ice_pf *pf)
        return 0;
 }
 
-/* PCIe configuration space setting */
-#define PCI_CFG_SPACE_SIZE          256
-#define PCI_CFG_SPACE_EXP_SIZE      4096
-#define PCI_EXT_CAP_ID(header)      (int)((header) & 0x0000ffff)
-#define PCI_EXT_CAP_NEXT(header)    (((header) >> 20) & 0xffc)
-#define PCI_EXT_CAP_ID_DSN          0x03
-
-static int
-ice_pci_find_next_ext_capability(struct rte_pci_device *dev, int cap)
-{
-       uint32_t header;
-       int ttl;
-       int pos = PCI_CFG_SPACE_SIZE;
-
-       /* minimum 8 bytes per capability */
-       ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
-
-       if (rte_pci_read_config(dev, &header, 4, pos) < 0) {
-               PMD_INIT_LOG(ERR, "ice error reading extended capabilities\n");
-               return -1;
-       }
-
-       /*
-        * If we have no capabilities, this is indicated by cap ID,
-        * cap version and next pointer all being 0.
-        */
-       if (header == 0)
-               return 0;
-
-       while (ttl-- > 0) {
-               if (PCI_EXT_CAP_ID(header) == cap)
-                       return pos;
-
-               pos = PCI_EXT_CAP_NEXT(header);
-
-               if (pos < PCI_CFG_SPACE_SIZE)
-                       break;
-
-               if (rte_pci_read_config(dev, &header, 4, pos) < 0) {
-                       PMD_INIT_LOG(ERR, "ice error reading extended capabilities\n");
-                       return -1;
-               }
-       }
-
-       return 0;
-}
-
 /*
  * Extract device serial number from PCIe Configuration Space and
  * determine the pkg file path according to the DSN.
@@ -1805,12 +1760,12 @@ ice_pci_find_next_ext_capability(struct rte_pci_device *dev, int cap)
 static int
 ice_pkg_file_search_path(struct rte_pci_device *pci_dev, char *pkg_file)
 {
-       int pos;
+       off_t pos;
        char opt_ddp_filename[ICE_MAX_PKG_FILENAME_SIZE];
        uint32_t dsn_low, dsn_high;
        memset(opt_ddp_filename, 0, ICE_MAX_PKG_FILENAME_SIZE);
 
-       pos = ice_pci_find_next_ext_capability(pci_dev, PCI_EXT_CAP_ID_DSN);
+       pos = rte_pci_find_ext_capability(pci_dev, RTE_PCI_EXT_CAP_ID_DSN);
 
        if (pos) {
                rte_pci_read_config(pci_dev, &dsn_low, 4, pos + 4);
@@ -2006,11 +1961,6 @@ static int ice_parse_devargs(struct rte_eth_dev *dev)
        if (ret)
                goto bail;
 
-       ret = rte_kvargs_process(kvlist, ICE_FLOW_MARK_SUPPORT_ARG,
-                                &parse_bool, &ad->devargs.flow_mark_support);
-       if (ret)
-               goto bail;
-
 bail:
        rte_kvargs_free(kvlist);
        return ret;
@@ -2147,6 +2097,24 @@ ice_rss_ctx_init(struct ice_pf *pf)
        ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_tcp);
 }
 
+static uint64_t
+ice_get_supported_rxdid(struct ice_hw *hw)
+{
+       uint64_t supported_rxdid = 0; /* bitmap for supported RXDID */
+       uint32_t regval;
+       int i;
+
+       supported_rxdid |= BIT(ICE_RXDID_LEGACY_1);
+
+       for (i = ICE_RXDID_FLEX_NIC; i < ICE_FLEX_DESC_RXDID_MAX_NUM; i++) {
+               regval = ICE_READ_REG(hw, GLFLXP_RXDID_FLAGS(i, 0));
+               if ((regval >> GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S)
+                       & GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M)
+                       supported_rxdid |= BIT(i);
+       }
+       return supported_rxdid;
+}
+
 static int
 ice_dev_init(struct rte_eth_dev *dev)
 {
@@ -2230,11 +2198,6 @@ ice_dev_init(struct rte_eth_dev *dev)
                goto err_init_mac;
        }
 
-       /* Pass the information to the rte_eth_dev_close() that it should also
-        * release the private port resources.
-        */
-       dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
-
        ret = ice_res_pool_init(&pf->msix_pool, 1,
                                hw->func_caps.common_cap.num_msix_vectors - 1);
        if (ret) {
@@ -2298,6 +2261,8 @@ ice_dev_init(struct rte_eth_dev *dev)
                return ret;
        }
 
+       pf->supported_rxdid = ice_get_supported_rxdid(hw);
+
        return 0;
 
 err_pf_setup:
@@ -2413,7 +2378,7 @@ ice_dev_stop(struct rte_eth_dev *dev)
        pf->adapter_stopped = true;
 }
 
-static void
+static int
 ice_dev_close(struct rte_eth_dev *dev)
 {
        struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
@@ -2423,6 +2388,9 @@ ice_dev_close(struct rte_eth_dev *dev)
        struct ice_adapter *ad =
                ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
 
+       if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+               return 0;
+
        /* Since stop will make link down, then the link event will be
         * triggered, disable the irq firstly to avoid the port_infoe etc
         * resources deallocation causing the interrupt service thread
@@ -2452,15 +2420,14 @@ ice_dev_close(struct rte_eth_dev *dev)
        dev->rx_pkt_burst = NULL;
        dev->tx_pkt_burst = NULL;
 
-       rte_free(dev->data->mac_addrs);
-       dev->data->mac_addrs = NULL;
-
        /* disable uio intr before callback unregister */
        rte_intr_disable(intr_handle);
 
        /* unregister callback func from eal lib */
        rte_intr_callback_unregister(intr_handle,
                                     ice_interrupt_handler, dev);
+
+       return 0;
 }
 
 static int
@@ -5158,8 +5125,7 @@ RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci");
 RTE_PMD_REGISTER_PARAM_STRING(net_ice,
                              ICE_PROTO_XTR_ARG "=[queue:]<vlan|ipv4|ipv6|ipv6_flow|tcp|ip_offset>"
                              ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>"
-                             ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>"
-                             ICE_FLOW_MARK_SUPPORT_ARG "=<0|1>");
+                             ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>");
 
 RTE_LOG_REGISTER(ice_logtype_init, pmd.net.ice.init, NOTICE);
 RTE_LOG_REGISTER(ice_logtype_driver, pmd.net.ice.driver, NOTICE);