RTE_PKTMBUF_HEADROOM);
__m128i dma_addr0, dma_addr1;
- rxdp = (union ice_rx_flex_desc *)rxq->rx_ring + rxq->rxrearm_start;
+ rxdp = rxq->rx_ring + rxq->rxrearm_start;
/* Pull 'n' more MBUFs into the software ring */
if (rte_mempool_get_bulk(rxq->mp,
const __m128i zero = _mm_setzero_si128();
/* mask to shuffle from desc. to mbuf */
const __m128i shuf_msk = _mm_set_epi8
- (0xFF, 0xFF, 0xFF, 0xFF, /* rss not supported */
+ (15, 14, 13, 12, /* octet 12~15, 32 bits rss */
11, 10, /* octet 10~11, 16 bits vlan_macip */
5, 4, /* octet 4~5, 16 bits data_len */
0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
/* Just the act of getting into the function from the application is
* going to cost about 7 cycles
*/
- rxdp = (union ice_rx_flex_desc *)rxq->rx_ring + rxq->rx_tail;
+ rxdp = rxq->rx_ring + rxq->rx_tail;
rte_prefetch0(rxdp);
return nb_tx;
}
-int __attribute__((cold))
+int __rte_cold
ice_rxq_vec_setup(struct ice_rx_queue *rxq)
{
if (!rxq)
return ice_rxq_vec_setup_default(rxq);
}
-int __attribute__((cold))
+int __rte_cold
ice_txq_vec_setup(struct ice_tx_queue __rte_unused *txq)
{
if (!txq)
return 0;
}
-int __attribute__((cold))
+int __rte_cold
ice_rx_vec_dev_check(struct rte_eth_dev *dev)
{
return ice_rx_vec_dev_check_default(dev);
}
-int __attribute__((cold))
+int __rte_cold
ice_tx_vec_dev_check(struct rte_eth_dev *dev)
{
return ice_tx_vec_dev_check_default(dev);