net/ice/base: init metainit table for parser
[dpdk.git] / drivers / net / ice / ice_rxtx_vec_sse.c
index 6029cc2..653bd28 100644 (file)
@@ -416,7 +416,7 @@ _ice_recv_raw_pkts_vec(struct ice_rx_queue *rxq, struct rte_mbuf **rx_pkts,
                /* B.1 load 2 (64 bit) or 4 (32 bit) mbuf points */
                mbp1 = _mm_loadu_si128((__m128i *)&sw_ring[pos]);
                /* Read desc statuses backwards to avoid race condition */
-               /* A.1 load 4 pkts desc */
+               /* A.1 load desc[3] */
                descs[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));
                rte_compiler_barrier();
 
@@ -428,9 +428,9 @@ _ice_recv_raw_pkts_vec(struct ice_rx_queue *rxq, struct rte_mbuf **rx_pkts,
                mbp2 = _mm_loadu_si128((__m128i *)&sw_ring[pos + 2]);
 #endif
 
+               /* A.1 load desc[2-0] */
                descs[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));
                rte_compiler_barrier();
-               /* B.1 load 2 mbuf point */
                descs[1] = _mm_loadu_si128((__m128i *)(rxdp + 1));
                rte_compiler_barrier();
                descs[0] = _mm_loadu_si128((__m128i *)(rxdp));
@@ -478,7 +478,7 @@ _ice_recv_raw_pkts_vec(struct ice_rx_queue *rxq, struct rte_mbuf **rx_pkts,
                 * needs to load 2nd 16B of each desc for RSS hash parsing,
                 * will cause performance drop to get into this context.
                 */
-               if (rxq->vsi->adapter->eth_dev->data->dev_conf.rxmode.offloads &
+               if (rxq->vsi->adapter->pf.dev_data->dev_conf.rxmode.offloads &
                                DEV_RX_OFFLOAD_RSS_HASH) {
                        /* load bottom half of every 32B desc */
                        const __m128i raw_desc_bh3 =
@@ -545,7 +545,7 @@ _ice_recv_raw_pkts_vec(struct ice_rx_queue *rxq, struct rte_mbuf **rx_pkts,
                        /* and with mask to extract bits, flipping 1-0 */
                        __m128i eop_bits = _mm_andnot_si128(staterr, eop_check);
                        /* the staterr values are not in order, as the count
-                        * count of dd bits doesn't care. However, for end of
+                        * of dd bits doesn't care. However, for end of
                         * packet tracking, we do care, so shuffle. This also
                         * compresses the 32-bit values to 8-bit
                         */