* Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
*/
+#include <stdbool.h>
+
#include <rte_malloc.h>
#include "ionic_dev.h"
struct ionic_dev *idev = &adapter->idev;
uint32_t sig;
u_char *bar0_base;
+ unsigned int i;
/* BAR0: dev_cmd and interrupts */
if (num_bars < 1) {
return -EFAULT;
}
+ for (i = 0; i < IONIC_DEVINFO_FWVERS_BUFLEN; i++)
+ adapter->fw_version[i] =
+ ioread8(&idev->dev_info->fw_version[i]);
+ adapter->fw_version[IONIC_DEVINFO_FWVERS_BUFLEN - 1] = '\0';
+
+ IONIC_PRINT(DEBUG, "Firmware version: %s", adapter->fw_version);
+
/* BAR1: doorbells */
bar++;
if (num_bars < 2) {
}
idev->db_pages = bar->vaddr;
- idev->phy_db_pages = bar->bus_addr;
return 0;
}
uint32_t cmd_size = sizeof(cmd->words) /
sizeof(cmd->words[0]);
+ IONIC_PRINT(DEBUG, "Sending %s (%d) via dev_cmd",
+ ionic_opcode_to_str(cmd->cmd.opcode), cmd->cmd.opcode);
+
for (i = 0; i < cmd_size; i++)
iowrite32(cmd->words[i], &idev->dev_cmd->cmd.words[i]);
union ionic_dev_cmd cmd = {
.port_init.opcode = IONIC_CMD_PORT_INIT,
.port_init.index = 0,
- .port_init.info_pa = idev->port_info_pa,
+ .port_init.info_pa = rte_cpu_to_le_64(idev->port_info_pa),
};
ionic_dev_cmd_go(idev, &cmd);
.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,
.port_setattr.index = 0,
.port_setattr.attr = IONIC_PORT_ATTR_SPEED,
- .port_setattr.speed = speed,
+ .port_setattr.speed = rte_cpu_to_le_32(speed),
};
ionic_dev_cmd_go(idev, &cmd);
.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,
.port_setattr.index = 0,
.port_setattr.attr = IONIC_PORT_ATTR_MTU,
- .port_setattr.mtu = mtu,
+ .port_setattr.mtu = rte_cpu_to_le_32(mtu),
};
ionic_dev_cmd_go(idev, &cmd);
/* LIF commands */
+void
+ionic_dev_cmd_queue_identify(struct ionic_dev *idev,
+ uint16_t lif_type, uint8_t qtype, uint8_t qver)
+{
+ union ionic_dev_cmd cmd = {
+ .q_identify.opcode = IONIC_CMD_Q_IDENTIFY,
+ .q_identify.lif_type = rte_cpu_to_le_16(lif_type),
+ .q_identify.type = qtype,
+ .q_identify.ver = qver,
+ };
+
+ ionic_dev_cmd_go(idev, &cmd);
+}
+
void
ionic_dev_cmd_lif_identify(struct ionic_dev *idev, uint8_t type, uint8_t ver)
{
}
void
-ionic_dev_cmd_lif_init(struct ionic_dev *idev, uint16_t lif_index,
- rte_iova_t info_pa)
+ionic_dev_cmd_lif_init(struct ionic_dev *idev, rte_iova_t info_pa)
{
union ionic_dev_cmd cmd = {
.lif_init.opcode = IONIC_CMD_LIF_INIT,
- .lif_init.index = lif_index,
- .lif_init.info_pa = info_pa,
+ .lif_init.info_pa = rte_cpu_to_le_64(info_pa),
};
ionic_dev_cmd_go(idev, &cmd);
}
void
-ionic_dev_cmd_lif_reset(struct ionic_dev *idev, uint16_t lif_index)
+ionic_dev_cmd_lif_reset(struct ionic_dev *idev)
{
union ionic_dev_cmd cmd = {
.lif_init.opcode = IONIC_CMD_LIF_RESET,
- .lif_init.index = lif_index,
};
ionic_dev_cmd_go(idev, &cmd);
return lif->kern_dbpage + q->hw_type;
}
-int
-ionic_db_page_num(struct ionic_lif *lif, int pid)
-{
- return (lif->index * 0) + pid;
-}
-
void
ionic_intr_init(struct ionic_dev *idev, struct ionic_intr_info *intr,
unsigned long index)
}
void
-ionic_dev_cmd_adminq_init(struct ionic_dev *idev,
- struct ionic_qcq *qcq,
- uint16_t lif_index, uint16_t intr_index)
+ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq)
{
struct ionic_queue *q = &qcq->q;
struct ionic_cq *cq = &qcq->cq;
union ionic_dev_cmd cmd = {
.q_init.opcode = IONIC_CMD_Q_INIT,
- .q_init.lif_index = lif_index,
.q_init.type = q->type,
- .q_init.index = q->index,
- .q_init.flags = IONIC_QINIT_F_ENA,
- .q_init.pid = q->pid,
- .q_init.intr_index = intr_index,
+ .q_init.ver = qcq->lif->qtype_info[q->type].version,
+ .q_init.index = rte_cpu_to_le_32(q->index),
+ .q_init.flags = rte_cpu_to_le_16(IONIC_QINIT_F_ENA),
+ .q_init.intr_index = rte_cpu_to_le_16(IONIC_INTR_NONE),
.q_init.ring_size = rte_log2_u32(q->num_descs),
- .q_init.ring_base = q->base_pa,
- .q_init.cq_ring_base = cq->base_pa,
+ .q_init.ring_base = rte_cpu_to_le_64(q->base_pa),
+ .q_init.cq_ring_base = rte_cpu_to_le_64(cq->base_pa),
};
+ IONIC_PRINT(DEBUG, "adminq.q_init.ver %u", cmd.q_init.ver);
+
ionic_dev_cmd_go(idev, &cmd);
}
int
ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq,
- struct ionic_intr_info *intr,
uint32_t num_descs, size_t desc_size)
{
if (desc_size == 0) {
}
cq->lif = lif;
- cq->bound_intr = intr;
cq->num_descs = num_descs;
cq->desc_size = desc_size;
cq->tail_idx = 0;
int
ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
struct ionic_queue *q, uint32_t index, uint32_t num_descs,
- size_t desc_size, size_t sg_desc_size, uint32_t pid)
+ size_t desc_size, size_t sg_desc_size)
{
uint32_t ring_size;
q->sg_desc_size = sg_desc_size;
q->head_idx = 0;
q->tail_idx = 0;
- q->pid = pid;
return 0;
}
q->sg_base_pa = base_pa;
}
-void
-ionic_q_flush(struct ionic_queue *q)
-{
- writeq(IONIC_DBELL_QID(q->hw_index) | q->head_idx, q->db);
-}
-
void
ionic_q_post(struct ionic_queue *q, bool ring_doorbell, desc_cb cb,
void *cb_arg)
ionic_q_flush(q);
}
-uint32_t
-ionic_q_space_avail(struct ionic_queue *q)
-{
- uint32_t avail = q->tail_idx;
-
- if (q->head_idx >= avail)
- avail += q->num_descs - q->head_idx - 1;
- else
- avail -= q->head_idx + 1;
-
- return avail;
-}
-
-bool
-ionic_q_has_space(struct ionic_queue *q, uint32_t want)
-{
- return ionic_q_space_avail(q) >= want;
-}
-
void
ionic_q_service(struct ionic_queue *q, uint32_t cq_desc_index,
uint32_t stop_index, void *service_cb_arg)
struct ionic_admin_ctx *ctx = cb_arg;
struct ionic_admin_comp *cq_desc_base = q->bound_cq->base;
struct ionic_admin_comp *cq_desc = &cq_desc_base[cq_desc_index];
+ uint16_t comp_index;
+
+ if (!ctx)
+ return;
- if (unlikely(cq_desc->comp_index != q_desc_index)) {
- IONIC_WARN_ON(cq_desc->comp_index != q_desc_index);
+ comp_index = rte_le_to_cpu_16(cq_desc->comp_index);
+ if (unlikely(comp_index != q_desc_index)) {
+ IONIC_WARN_ON(comp_index != q_desc_index);
return;
}
rte_spinlock_lock(&lif->adminq_lock);
- if (!ionic_q_has_space(adminq, 1)) {
+ if (ionic_q_space_avail(adminq) < 1) {
err = -ENOSPC;
goto err_out;
}
git.droids-corp.org / dpdk.git / blobdiff