#include <rte_pci.h>
#include <rte_bus_pci.h>
#include <rte_ethdev.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
#include <rte_malloc.h>
-#include <rte_ethdev_pci.h>
+#include <ethdev_pci.h>
#include "ionic_logs.h"
#include "ionic.h"
static int ionic_dev_configure(struct rte_eth_dev *dev);
static int ionic_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
static int ionic_dev_start(struct rte_eth_dev *dev);
-static void ionic_dev_stop(struct rte_eth_dev *dev);
+static int ionic_dev_stop(struct rte_eth_dev *dev);
static int ionic_dev_close(struct rte_eth_dev *dev);
static int ionic_dev_set_link_up(struct rte_eth_dev *dev);
static int ionic_dev_set_link_down(struct rte_eth_dev *dev);
-static int ionic_dev_link_update(struct rte_eth_dev *eth_dev,
- int wait_to_complete);
static int ionic_flow_ctrl_get(struct rte_eth_dev *eth_dev,
struct rte_eth_fc_conf *fc_conf);
static int ionic_flow_ctrl_set(struct rte_eth_dev *eth_dev,
ionic_dev_set_link_up(struct rte_eth_dev *eth_dev)
{
struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
- struct ionic_adapter *adapter = lif->adapter;
- struct ionic_dev *idev = &adapter->idev;
int err;
IONIC_PRINT_CALL();
- ionic_dev_cmd_port_state(idev, IONIC_PORT_ADMIN_STATE_UP);
+ err = ionic_lif_start(lif);
+ if (err)
+ IONIC_PRINT(ERR, "Could not start lif to set link up");
- err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
- if (err) {
- IONIC_PRINT(WARNING, "Failed to bring port UP");
- return err;
- }
+ ionic_dev_link_update(lif->eth_dev, 0);
- return 0;
+ return err;
}
/*
ionic_dev_set_link_down(struct rte_eth_dev *eth_dev)
{
struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
- struct ionic_adapter *adapter = lif->adapter;
- struct ionic_dev *idev = &adapter->idev;
- int err;
IONIC_PRINT_CALL();
- ionic_dev_cmd_port_state(idev, IONIC_PORT_ADMIN_STATE_DOWN);
+ ionic_lif_stop(lif);
- err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
- if (err) {
- IONIC_PRINT(WARNING, "Failed to bring port DOWN");
- return err;
- }
+ ionic_dev_link_update(lif->eth_dev, 0);
return 0;
}
-static int
+int
ionic_dev_link_update(struct rte_eth_dev *eth_dev,
int wait_to_complete __rte_unused)
{
/* Initialize */
memset(&link, 0, sizeof(link));
- link.link_autoneg = ETH_LINK_AUTONEG;
- if (!adapter->link_up) {
+ if (adapter->idev.port_info->config.an_enable) {
+ link.link_autoneg = ETH_LINK_AUTONEG;
+ }
+
+ if (!adapter->link_up ||
+ !(lif->state & IONIC_LIF_F_UP)) {
/* Interface is down */
link.link_status = ETH_LINK_DOWN;
link.link_duplex = ETH_LINK_HALF_DUPLEX;
ionic_dev_interrupt_handler(void *param)
{
struct ionic_adapter *adapter = (struct ionic_adapter *)param;
- uint32_t i;
IONIC_PRINT(DEBUG, "->");
- for (i = 0; i < adapter->nlifs; i++) {
- if (adapter->lifs[i])
- ionic_notifyq_handler(adapter->lifs[i], -1);
- }
+ if (adapter->lif)
+ ionic_notifyq_handler(adapter->lif, -1);
}
static int
struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
struct ionic_adapter *adapter = lif->adapter;
struct ionic_identity *ident = &adapter->ident;
+ union ionic_lif_config *cfg = &ident->lif.eth.config;
IONIC_PRINT_CALL();
dev_info->max_rx_queues = (uint16_t)
- ident->lif.eth.config.queue_count[IONIC_QTYPE_RXQ];
+ rte_le_to_cpu_32(cfg->queue_count[IONIC_QTYPE_RXQ]);
dev_info->max_tx_queues = (uint16_t)
- ident->lif.eth.config.queue_count[IONIC_QTYPE_TXQ];
+ rte_le_to_cpu_32(cfg->queue_count[IONIC_QTYPE_TXQ]);
+
/* Also add ETHER_CRC_LEN if the adapter is able to keep CRC */
dev_info->min_rx_bufsize = IONIC_MIN_MTU + RTE_ETHER_HDR_LEN;
dev_info->max_rx_pktlen = IONIC_MAX_MTU + RTE_ETHER_HDR_LEN;
dev_info->max_mtu = IONIC_MAX_MTU;
dev_info->hash_key_size = IONIC_RSS_HASH_KEY_SIZE;
- dev_info->reta_size = ident->lif.eth.rss_ind_tbl_sz;
+ dev_info->reta_size = rte_le_to_cpu_16(ident->lif.eth.rss_ind_tbl_sz);
dev_info->flow_type_rss_offloads = IONIC_ETH_RSS_OFFLOAD_ALL;
dev_info->speed_capa =
ETH_LINK_SPEED_100G;
/*
- * Per-queue capabilities. Actually most of the offloads are enabled
- * by default on the port and can be used on selected queues (by adding
- * packet flags at runtime when required)
+ * Per-queue capabilities
+ * RTE does not support disabling a feature on a queue if it is
+ * enabled globally on the device. Thus the driver does not advertise
+ * capabilities like DEV_TX_OFFLOAD_IPV4_CKSUM as per-queue even
+ * though the driver would be otherwise capable of disabling it on
+ * a per-queue basis.
*/
- dev_info->rx_queue_offload_capa =
- DEV_RX_OFFLOAD_IPV4_CKSUM |
- DEV_RX_OFFLOAD_UDP_CKSUM |
- DEV_RX_OFFLOAD_TCP_CKSUM |
- 0;
-
- dev_info->tx_queue_offload_capa =
- DEV_TX_OFFLOAD_IPV4_CKSUM |
- DEV_TX_OFFLOAD_UDP_CKSUM |
- DEV_TX_OFFLOAD_TCP_CKSUM |
- DEV_TX_OFFLOAD_VLAN_INSERT |
- DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
- DEV_TX_OFFLOAD_OUTER_UDP_CKSUM |
- 0;
+ dev_info->rx_queue_offload_capa = 0;
+ dev_info->tx_queue_offload_capa = 0;
/*
* Per-port capabilities
*/
dev_info->rx_offload_capa = dev_info->rx_queue_offload_capa |
+ DEV_RX_OFFLOAD_IPV4_CKSUM |
+ DEV_RX_OFFLOAD_UDP_CKSUM |
+ DEV_RX_OFFLOAD_TCP_CKSUM |
DEV_RX_OFFLOAD_JUMBO_FRAME |
DEV_RX_OFFLOAD_VLAN_FILTER |
DEV_RX_OFFLOAD_VLAN_STRIP |
DEV_RX_OFFLOAD_SCATTER |
+ DEV_RX_OFFLOAD_RSS_HASH |
0;
dev_info->tx_offload_capa = dev_info->tx_queue_offload_capa |
+ DEV_TX_OFFLOAD_IPV4_CKSUM |
+ DEV_TX_OFFLOAD_UDP_CKSUM |
+ DEV_TX_OFFLOAD_TCP_CKSUM |
+ DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
+ DEV_TX_OFFLOAD_OUTER_UDP_CKSUM |
DEV_TX_OFFLOAD_MULTI_SEGS |
DEV_TX_OFFLOAD_TCP_TSO |
+ DEV_TX_OFFLOAD_VLAN_INSERT |
0;
dev_info->rx_desc_lim = rx_desc_lim;
dev_info->default_rxportconf.ring_size = IONIC_DEF_TXRX_DESC;
dev_info->default_txportconf.ring_size = IONIC_DEF_TXRX_DESC;
+ dev_info->default_rxconf = (struct rte_eth_rxconf) {
+ /* Packets are always dropped if no desc are available */
+ .rx_drop_en = 1,
+ };
+
return 0;
}
struct ionic_dev *idev = &adapter->idev;
if (idev->port_info) {
- fc_conf->autoneg = idev->port_info->config.an_enable;
+ /* Flow control autoneg not supported */
+ fc_conf->autoneg = 0;
if (idev->port_info->config.pause_type)
fc_conf->mode = RTE_FC_FULL;
struct ionic_adapter *adapter = lif->adapter;
struct ionic_dev *idev = &adapter->idev;
uint8_t pause_type = IONIC_PORT_PAUSE_TYPE_NONE;
- uint8_t an_enable;
+ int err;
+
+ if (fc_conf->autoneg) {
+ IONIC_PRINT(WARNING, "Flow control autoneg not supported");
+ return -ENOTSUP;
+ }
switch (fc_conf->mode) {
case RTE_FC_NONE:
return -ENOTSUP;
}
- an_enable = fc_conf->autoneg;
-
ionic_dev_cmd_port_pause(idev, pause_type);
- ionic_dev_cmd_port_autoneg(idev, an_enable);
+ err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
+ if (err)
+ IONIC_PRINT(WARNING, "Failed to configure flow control");
- return 0;
+ return err;
}
static int
ionic_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
{
struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
- struct rte_eth_rxmode *rxmode;
- rxmode = ð_dev->data->dev_conf.rxmode;
- int i;
-
- if (mask & ETH_VLAN_STRIP_MASK) {
- if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) {
- for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
- struct ionic_qcq *rxq =
- eth_dev->data->rx_queues[i];
- rxq->offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
- }
- lif->features |= IONIC_ETH_HW_VLAN_RX_STRIP;
- } else {
- for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
- struct ionic_qcq *rxq =
- eth_dev->data->rx_queues[i];
- rxq->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
- }
- lif->features &= ~IONIC_ETH_HW_VLAN_RX_STRIP;
- }
- }
- if (mask & ETH_VLAN_FILTER_MASK) {
- if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
- lif->features |= IONIC_ETH_HW_VLAN_RX_FILTER;
- else
- lif->features &= ~IONIC_ETH_HW_VLAN_RX_FILTER;
- }
+ ionic_lif_configure_vlan_offload(lif, mask);
ionic_lif_set_features(lif);
struct ionic_adapter *adapter = lif->adapter;
struct ionic_identity *ident = &adapter->ident;
uint32_t i, j, index, num;
+ uint16_t tbl_sz = rte_le_to_cpu_16(ident->lif.eth.rss_ind_tbl_sz);
IONIC_PRINT_CALL();
return -EINVAL;
}
- if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
+ if (reta_size != tbl_sz) {
IONIC_PRINT(ERR, "The size of hash lookup table configured "
- "(%d) doesn't match the number hardware can supported "
+ "(%d) does not match the number hardware can support "
"(%d)",
- reta_size, ident->lif.eth.rss_ind_tbl_sz);
+ reta_size, tbl_sz);
return -EINVAL;
}
- num = lif->adapter->ident.lif.eth.rss_ind_tbl_sz / RTE_RETA_GROUP_SIZE;
+ num = tbl_sz / RTE_RETA_GROUP_SIZE;
for (i = 0; i < num; i++) {
for (j = 0; j < RTE_RETA_GROUP_SIZE; j++) {
struct ionic_adapter *adapter = lif->adapter;
struct ionic_identity *ident = &adapter->ident;
int i, num;
+ uint16_t tbl_sz = rte_le_to_cpu_16(ident->lif.eth.rss_ind_tbl_sz);
IONIC_PRINT_CALL();
- if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
+ if (reta_size != tbl_sz) {
IONIC_PRINT(ERR, "The size of hash lookup table configured "
- "(%d) doesn't match the number hardware can supported "
+ "(%d) does not match the number hardware can support "
"(%d)",
- reta_size, ident->lif.eth.rss_ind_tbl_sz);
+ reta_size, tbl_sz);
return -EINVAL;
}
ionic_dev_configure(struct rte_eth_dev *eth_dev)
{
struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
- int err;
IONIC_PRINT_CALL();
- err = ionic_lif_configure(lif);
- if (err) {
- IONIC_PRINT(ERR, "Cannot configure LIF: %d", err);
- return err;
- }
+ ionic_lif_configure(lif);
+
+ ionic_lif_set_features(lif);
return 0;
}
struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
struct ionic_adapter *adapter = lif->adapter;
struct ionic_dev *idev = &adapter->idev;
- uint32_t allowed_speeds;
+ uint32_t speed = 0, allowed_speeds;
+ uint8_t an_enable;
int err;
IONIC_PRINT_CALL();
return -EINVAL;
}
+ if (dev_conf->lpbk_mode)
+ IONIC_PRINT(WARNING, "Loopback mode not supported");
+
err = ionic_lif_start(lif);
if (err) {
IONIC_PRINT(ERR, "Cannot start LIF: %d", err);
return err;
}
- if (eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED) {
- uint32_t speed = ionic_parse_link_speeds(dev_conf->link_speeds);
+ /* Configure link */
+ an_enable = (dev_conf->link_speeds & ETH_LINK_SPEED_FIXED) == 0;
- if (speed)
- ionic_dev_cmd_port_speed(idev, speed);
+ ionic_dev_cmd_port_autoneg(idev, an_enable);
+ err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
+ if (err)
+ IONIC_PRINT(WARNING, "Failed to %s autonegotiation",
+ an_enable ? "enable" : "disable");
+
+ if (!an_enable)
+ speed = ionic_parse_link_speeds(dev_conf->link_speeds);
+ if (speed) {
+ ionic_dev_cmd_port_speed(idev, speed);
+ err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
+ if (err)
+ IONIC_PRINT(WARNING, "Failed to set link speed %u",
+ speed);
}
ionic_dev_link_update(eth_dev, 0);
/*
* Stop device: disable rx and tx functions to allow for reconfiguring.
*/
-static void
+static int
ionic_dev_stop(struct rte_eth_dev *eth_dev)
{
struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
- int err;
IONIC_PRINT_CALL();
- err = ionic_lif_stop(lif);
- if (err)
- IONIC_PRINT(ERR, "Cannot stop LIF: %d", err);
+ ionic_lif_stop(lif);
+
+ return 0;
}
+static void ionic_unconfigure_intr(struct ionic_adapter *adapter);
+
/*
* Reset and stop device.
*/
ionic_dev_close(struct rte_eth_dev *eth_dev)
{
struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
- int err;
+ struct ionic_adapter *adapter = lif->adapter;
IONIC_PRINT_CALL();
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
- err = ionic_lif_stop(lif);
- if (err) {
- IONIC_PRINT(ERR, "Cannot stop LIF: %d", err);
- return -1;
- }
+ ionic_lif_stop(lif);
- err = eth_ionic_dev_uninit(eth_dev);
- if (err) {
- IONIC_PRINT(ERR, "Cannot destroy LIF: %d", err);
- return -1;
- }
+ ionic_lif_free_queues(lif);
+
+ IONIC_PRINT(NOTICE, "Removing device %s", eth_dev->device->name);
+ ionic_unconfigure_intr(adapter);
+
+ rte_eth_dev_destroy(eth_dev, eth_ionic_dev_uninit);
+
+ ionic_port_reset(adapter);
+ ionic_reset(adapter);
+
+ rte_free(adapter);
return 0;
}
return 0;
rte_eth_copy_pci_info(eth_dev, pci_dev);
+ eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
- lif->index = adapter->nlifs;
lif->eth_dev = eth_dev;
lif->adapter = adapter;
- adapter->lifs[adapter->nlifs] = lif;
+ adapter->lif = lif;
IONIC_PRINT(DEBUG, "Up to %u MAC addresses supported",
adapter->max_mac_addrs);
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
- adapter->lifs[lif->index] = NULL;
+ adapter->lif = NULL;
ionic_lif_deinit(lif);
ionic_lif_free(lif);
- eth_dev->dev_ops = NULL;
- eth_dev->rx_pkt_burst = NULL;
- eth_dev->tx_pkt_burst = NULL;
- eth_dev->tx_pkt_prepare = NULL;
+ if (!(lif->state & IONIC_LIF_F_FW_RESET))
+ ionic_lif_reset(lif);
return 0;
}
goto err_free_adapter;
}
- adapter->is_mgmt_nic = (pci_dev->id.device_id == IONIC_DEV_ID_ETH_MGMT);
-
adapter->num_bars = 0;
for (i = 0; i < PCI_MAX_RESOURCE && i < IONIC_BARS_MAX; i++) {
resource = &pci_dev->mem_resource[i];
goto err_free_adapter;
}
- adapter->max_mac_addrs = adapter->ident.lif.eth.max_ucast_filters;
-
- adapter->nlifs = 0;
- for (i = 0; i < adapter->ident.dev.nlifs; i++) {
- snprintf(name, sizeof(name), "net_%s_lif_%lu",
- pci_dev->device.name, i);
+ adapter->max_mac_addrs =
+ rte_le_to_cpu_32(adapter->ident.lif.eth.max_ucast_filters);
- err = rte_eth_dev_create(&pci_dev->device, name,
- sizeof(struct ionic_lif),
- NULL, NULL,
- eth_ionic_dev_init, adapter);
- if (err) {
- IONIC_PRINT(ERR, "Cannot create eth device for "
- "ionic lif %s", name);
- break;
- }
+ if (rte_le_to_cpu_32(adapter->ident.dev.nlifs) != 1) {
+ IONIC_PRINT(ERR, "Unexpected request for %d LIFs",
+ rte_le_to_cpu_32(adapter->ident.dev.nlifs));
+ goto err_free_adapter;
+ }
- adapter->nlifs++;
+ snprintf(name, sizeof(name), "%s_lif", pci_dev->device.name);
+ err = rte_eth_dev_create(&pci_dev->device,
+ name, sizeof(struct ionic_lif),
+ NULL, NULL, eth_ionic_dev_init, adapter);
+ if (err) {
+ IONIC_PRINT(ERR, "Cannot create eth device for %s", name);
+ goto err_free_adapter;
}
err = ionic_configure_intr(adapter);
}
static int
-eth_ionic_pci_remove(struct rte_pci_device *pci_dev __rte_unused)
+eth_ionic_pci_remove(struct rte_pci_device *pci_dev)
{
char name[RTE_ETH_NAME_MAX_LEN];
- struct ionic_adapter *adapter = NULL;
struct rte_eth_dev *eth_dev;
- struct ionic_lif *lif;
- uint32_t i;
- /* Adapter lookup is using (the first) eth_dev name */
- snprintf(name, sizeof(name), "net_%s_lif_0",
- pci_dev->device.name);
+ /* Adapter lookup is using the eth_dev name */
+ snprintf(name, sizeof(name), "%s_lif", pci_dev->device.name);
eth_dev = rte_eth_dev_allocated(name);
- if (eth_dev) {
- lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
- adapter = lif->adapter;
- }
-
- if (adapter) {
- ionic_unconfigure_intr(adapter);
-
- for (i = 0; i < adapter->nlifs; i++) {
- lif = adapter->lifs[i];
- rte_eth_dev_destroy(lif->eth_dev, eth_ionic_dev_uninit);
- }
-
- rte_free(adapter);
- }
+ if (eth_dev)
+ ionic_dev_close(eth_dev);
+ else
+ IONIC_PRINT(DEBUG, "Cannot find device %s",
+ pci_dev->device.name);
return 0;
}
git.droids-corp.org / dpdk.git / blobdiff