*/
#include <rte_malloc.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
#include "ionic.h"
#include "ionic_logs.h"
void
ionic_lif_stop(struct ionic_lif *lif)
{
+ uint32_t i;
+
IONIC_PRINT_CALL();
lif->state &= ~IONIC_LIF_F_UP;
+
+ for (i = 0; i < lif->nrxqcqs; i++) {
+ struct ionic_qcq *rxq = lif->rxqcqs[i];
+ if (rxq->flags & IONIC_QCQ_F_INITED)
+ (void)ionic_dev_rx_queue_stop(lif->eth_dev, i);
+ }
+
+ for (i = 0; i < lif->ntxqcqs; i++) {
+ struct ionic_qcq *txq = lif->txqcqs[i];
+ if (txq->flags & IONIC_QCQ_F_INITED)
+ (void)ionic_dev_tx_queue_stop(lif->eth_dev, i);
+ }
}
void
.opcode = IONIC_CMD_Q_INIT,
.type = q->type,
.index = q->index,
- .flags = IONIC_QINIT_F_SG,
+ .flags = IONIC_QINIT_F_SG | IONIC_QINIT_F_ENA,
.intr_index = cq->bound_intr->index,
.ring_size = rte_log2_u32(q->num_descs),
.ring_base = q->base_pa,
.opcode = IONIC_CMD_Q_INIT,
.type = q->type,
.index = q->index,
- .flags = IONIC_QINIT_F_SG,
+ .flags = IONIC_QINIT_F_SG | IONIC_QINIT_F_ENA,
.intr_index = cq->bound_intr->index,
.ring_size = rte_log2_u32(q->num_descs),
.ring_base = q->base_pa,
if (err)
return err;
- if (!rte_is_zero_ether_addr((struct rte_ether_addr *)
- lif->mac_addr)) {
- IONIC_PRINT(INFO, "deleting station MAC addr");
-
- ionic_lif_addr_del(lif, lif->mac_addr);
- }
-
memcpy(lif->mac_addr, ctx.comp.lif_getattr.mac, RTE_ETHER_ADDR_LEN);
- if (rte_is_zero_ether_addr((struct rte_ether_addr *)lif->mac_addr)) {
- IONIC_PRINT(NOTICE, "empty MAC addr (VF?)");
- return 0;
- }
-
- IONIC_PRINT(DEBUG, "adding station MAC addr");
-
- ionic_lif_addr_add(lif, lif->mac_addr);
-
return 0;
}
if (err)
goto err_out_adminq_deinit;
- lif->features =
- IONIC_ETH_HW_VLAN_TX_TAG
- | IONIC_ETH_HW_VLAN_RX_STRIP
- | IONIC_ETH_HW_VLAN_RX_FILTER
- | IONIC_ETH_HW_RX_HASH
- | IONIC_ETH_HW_TX_SG
- | IONIC_ETH_HW_RX_SG
- | IONIC_ETH_HW_TX_CSUM
- | IONIC_ETH_HW_RX_CSUM
- | IONIC_ETH_HW_TSO
- | IONIC_ETH_HW_TSO_IPV6
- | IONIC_ETH_HW_TSO_ECN;
+ /*
+ * Configure initial feature set
+ * This will be updated later by the dev_configure() step
+ */
+ lif->features = IONIC_ETH_HW_RX_HASH | IONIC_ETH_HW_VLAN_RX_FILTER;
err = ionic_lif_set_features(lif);
if (err)
lif->state &= ~IONIC_LIF_F_INITED;
}
-int
+void
+ionic_lif_configure_vlan_offload(struct ionic_lif *lif, int mask)
+{
+ struct rte_eth_dev *eth_dev = lif->eth_dev;
+ struct rte_eth_rxmode *rxmode = ð_dev->data->dev_conf.rxmode;
+
+ /*
+ * IONIC_ETH_HW_VLAN_RX_FILTER cannot be turned off, so
+ * set DEV_RX_OFFLOAD_VLAN_FILTER and ignore ETH_VLAN_FILTER_MASK
+ */
+ rxmode->offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
+
+ if (mask & ETH_VLAN_STRIP_MASK) {
+ if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
+ lif->features |= IONIC_ETH_HW_VLAN_RX_STRIP;
+ else
+ lif->features &= ~IONIC_ETH_HW_VLAN_RX_STRIP;
+ }
+}
+
+void
ionic_lif_configure(struct ionic_lif *lif)
{
+ struct rte_eth_rxmode *rxmode = &lif->eth_dev->data->dev_conf.rxmode;
+ struct rte_eth_txmode *txmode = &lif->eth_dev->data->dev_conf.txmode;
struct ionic_identity *ident = &lif->adapter->ident;
uint32_t ntxqs_per_lif =
ident->lif.eth.config.queue_count[IONIC_QTYPE_TXQ];
lif->nrxqcqs = nrxqs_per_lif;
lif->ntxqcqs = ntxqs_per_lif;
- return 0;
+ /* Update the LIF configuration based on the eth_dev */
+
+ /*
+ * NB: While it is true that RSS_HASH is always enabled on ionic,
+ * setting this flag unconditionally causes problems in DTS.
+ * rxmode->offloads |= DEV_RX_OFFLOAD_RSS_HASH;
+ */
+
+ /* RX per-port */
+
+ if (rxmode->offloads & DEV_RX_OFFLOAD_IPV4_CKSUM ||
+ rxmode->offloads & DEV_RX_OFFLOAD_UDP_CKSUM ||
+ rxmode->offloads & DEV_RX_OFFLOAD_TCP_CKSUM)
+ lif->features |= IONIC_ETH_HW_RX_CSUM;
+ else
+ lif->features &= ~IONIC_ETH_HW_RX_CSUM;
+
+ if (rxmode->offloads & DEV_RX_OFFLOAD_SCATTER) {
+ lif->features |= IONIC_ETH_HW_RX_SG;
+ lif->eth_dev->data->scattered_rx = 1;
+ } else {
+ lif->features &= ~IONIC_ETH_HW_RX_SG;
+ lif->eth_dev->data->scattered_rx = 0;
+ }
+
+ /* Covers VLAN_STRIP */
+ ionic_lif_configure_vlan_offload(lif, ETH_VLAN_STRIP_MASK);
+
+ /* TX per-port */
+
+ if (txmode->offloads & DEV_TX_OFFLOAD_IPV4_CKSUM ||
+ txmode->offloads & DEV_TX_OFFLOAD_UDP_CKSUM ||
+ txmode->offloads & DEV_TX_OFFLOAD_TCP_CKSUM ||
+ txmode->offloads & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM ||
+ txmode->offloads & DEV_TX_OFFLOAD_OUTER_UDP_CKSUM)
+ lif->features |= IONIC_ETH_HW_TX_CSUM;
+ else
+ lif->features &= ~IONIC_ETH_HW_TX_CSUM;
+
+ if (txmode->offloads & DEV_TX_OFFLOAD_VLAN_INSERT)
+ lif->features |= IONIC_ETH_HW_VLAN_TX_TAG;
+ else
+ lif->features &= ~IONIC_ETH_HW_VLAN_TX_TAG;
+
+ if (txmode->offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
+ lif->features |= IONIC_ETH_HW_TX_SG;
+ else
+ lif->features &= ~IONIC_ETH_HW_TX_SG;
+
+ if (txmode->offloads & DEV_TX_OFFLOAD_TCP_TSO) {
+ lif->features |= IONIC_ETH_HW_TSO;
+ lif->features |= IONIC_ETH_HW_TSO_IPV6;
+ lif->features |= IONIC_ETH_HW_TSO_ECN;
+ } else {
+ lif->features &= ~IONIC_ETH_HW_TSO;
+ lif->features &= ~IONIC_ETH_HW_TSO_IPV6;
+ lif->features &= ~IONIC_ETH_HW_TSO_ECN;
+ }
}
int