net/mvpp2: support user defined configuration

[dpdk.git] / drivers / net / ionic / ionic_rxtx.c

diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index 2a47a28..2a706b8 100644 (file)
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -67,7 +67,7 @@ ionic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
        qinfo->conf.tx_deferred_start = txq->flags & IONIC_QCQ_F_DEFERRED;
 }
 
-static inline void __rte_cold
+static __rte_always_inline void
 ionic_tx_flush(struct ionic_cq *cq)
 {
        struct ionic_queue *q = cq->bound_q;
@@ -334,7 +334,8 @@ ionic_tx_tso(struct ionic_qcq *txq, struct rte_mbuf *txm,
        struct ionic_txq_desc *desc;
        struct ionic_txq_sg_elem *elem;
        struct rte_mbuf *txm_seg;
-       uint64_t desc_addr = 0;
+       rte_iova_t data_iova;
+       uint64_t desc_addr = 0, next_addr;
        uint16_t desc_len = 0;
        uint8_t desc_nsge;
        uint32_t hdrlen;
@@ -371,6 +372,7 @@ ionic_tx_tso(struct ionic_qcq *txq, struct rte_mbuf *txm,
 
        seglen = hdrlen + mss;
        left = txm->data_len;
+       data_iova = rte_mbuf_data_iova(txm);
 
        desc = ionic_tx_tso_next(q, &elem);
        start = true;
@@ -380,7 +382,7 @@ ionic_tx_tso(struct ionic_qcq *txq, struct rte_mbuf *txm,
        while (left > 0) {
                len = RTE_MIN(seglen, left);
                frag_left = seglen - len;
-               desc_addr = rte_cpu_to_le_64(rte_mbuf_data_iova_default(txm));
+               desc_addr = rte_cpu_to_le_64(data_iova + offset);
                desc_len = len;
                desc_nsge = 0;
                left -= len;
@@ -404,24 +406,23 @@ ionic_tx_tso(struct ionic_qcq *txq, struct rte_mbuf *txm,
        txm_seg = txm->next;
        while (txm_seg != NULL) {
                offset = 0;
+               data_iova = rte_mbuf_data_iova(txm_seg);
                left = txm_seg->data_len;
                stats->frags++;
 
                while (left > 0) {
-                       rte_iova_t data_iova;
-                       data_iova = rte_mbuf_data_iova(txm_seg);
-                       elem->addr = rte_cpu_to_le_64(data_iova) + offset;
+                       next_addr = rte_cpu_to_le_64(data_iova + offset);
                        if (frag_left > 0) {
                                len = RTE_MIN(frag_left, left);
                                frag_left -= len;
+                               elem->addr = next_addr;
                                elem->len = len;
                                elem++;
                                desc_nsge++;
                        } else {
                                len = RTE_MIN(mss, left);
                                frag_left = mss - len;
-                               data_iova = rte_mbuf_data_iova(txm_seg);
-                               desc_addr = rte_cpu_to_le_64(data_iova);
+                               desc_addr = next_addr;
                                desc_len = len;
                                desc_nsge = 0;
                        }
@@ -429,6 +430,7 @@ ionic_tx_tso(struct ionic_qcq *txq, struct rte_mbuf *txm,
                        offset += len;
                        if (txm_seg->next != NULL && frag_left > 0)
                                continue;
+
                        done = (txm_seg->next == NULL && left == 0);
                        ionic_tx_tso_post(q, desc, txm_seg,
                                desc_addr, desc_nsge, desc_len,
@@ -448,7 +450,7 @@ ionic_tx_tso(struct ionic_qcq *txq, struct rte_mbuf *txm,
        return 0;
 }
 
-static int
+static __rte_always_inline int
 ionic_tx(struct ionic_qcq *txq, struct rte_mbuf *txm,
                bool not_xmit_more)
 {
@@ -463,7 +465,7 @@ ionic_tx(struct ionic_qcq *txq, struct rte_mbuf *txm,
        bool encap;
        bool has_vlan;
        uint64_t ol_flags = txm->ol_flags;
-       uint64_t addr = rte_cpu_to_le_64(rte_mbuf_data_iova_default(txm));
+       uint64_t addr;
        uint8_t opcode = IONIC_TXQ_DESC_OPCODE_CSUM_NONE;
        uint8_t flags = 0;
 
@@ -493,6 +495,8 @@ ionic_tx(struct ionic_qcq *txq, struct rte_mbuf *txm,
        flags |= has_vlan ? IONIC_TXQ_DESC_FLAG_VLAN : 0;
        flags |= encap ? IONIC_TXQ_DESC_FLAG_ENCAP : 0;
 
+       addr = rte_cpu_to_le_64(rte_mbuf_data_iova(txm));
+
        desc->cmd = encode_txq_desc_cmd(opcode, flags, txm->nb_segs - 1, addr);
        desc->len = txm->data_len;
        desc->vlan_tci = txm->vlan_tci;
@@ -736,7 +740,7 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
        return 0;
 }
 
-static void
+static __rte_always_inline void
 ionic_rx_clean(struct ionic_queue *q,
                uint32_t q_desc_index, uint32_t cq_desc_index,
                void *cb_arg, void *service_cb_arg)
@@ -897,7 +901,7 @@ ionic_rx_recycle(struct ionic_queue *q, uint32_t q_desc_index,
        ionic_q_post(q, true, ionic_rx_clean, mbuf);
 }
 
-static int __rte_cold
+static __rte_always_inline int
 ionic_rx_fill(struct ionic_qcq *rxq, uint32_t len)
 {
        struct ionic_queue *q = &rxq->q;
@@ -1013,7 +1017,7 @@ ionic_dev_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)
        return 0;
 }
 
-static inline void __rte_cold
+static __rte_always_inline void
 ionic_rxq_service(struct ionic_cq *cq, uint32_t work_to_do,
                void *service_cb_arg)
 {