#include <rte_mbuf.h>
#include <rte_flow_driver.h>
-#include <rte_ethdev_driver.h>
-#include <rte_ethdev_vdev.h>
+#include <ethdev_driver.h>
+#include <ethdev_vdev.h>
#include <rte_malloc.h>
#include <rte_memcpy.h>
#include <rte_bus_vdev.h>
/* IPN3KE TM Hierarchy Specification */
struct ipn3ke_tm_hierarchy {
struct ipn3ke_tm_node *port_node;
- /*struct ipn3ke_tm_node_list vt_node_list;*/
- /*struct ipn3ke_tm_node_list cos_node_list;*/
-
uint32_t n_shaper_profiles;
- /*uint32_t n_shared_shapers;*/
uint32_t n_tdrop_profiles;
uint32_t n_vt_nodes;
uint32_t n_cos_nodes;
-
struct ipn3ke_tm_node *port_commit_node;
struct ipn3ke_tm_node_list vt_commit_node_list;
struct ipn3ke_tm_node_list cos_commit_node_list;
-
- /*uint32_t n_tm_nodes[IPN3KE_TM_NODE_LEVEL_MAX];*/
};
struct ipn3ke_tm_internals {
};
/**
- * Strucute to store private data for each representor instance
+ * Structure to store private data for each representor instance
*/
struct ipn3ke_rpst {
TAILQ_ENTRY(ipn3ke_rpst) next; /**< Next in device list. */
uint16_t i40e_pf_eth_port_id;
struct rte_eth_link ori_linfo;
struct ipn3ke_tm_internals tm;
- /**< Private data store of assocaiated physical function */
+ /**< Private data store of associated physical function */
struct rte_ether_addr mac_addr;
};
ipn3ke_rpst_promiscuous_enable(struct rte_eth_dev *ethdev);
int
ipn3ke_rpst_promiscuous_disable(struct rte_eth_dev *ethdev);
-void
+int
ipn3ke_rpst_allmulticast_enable(struct rte_eth_dev *ethdev);
-void
+int
ipn3ke_rpst_allmulticast_disable(struct rte_eth_dev *ethdev);
int
ipn3ke_rpst_mac_addr_set(struct rte_eth_dev *ethdev,
#define IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_MASK \
IPN3KE_MASK(0x1, IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_SHIFT)
-#define IPN3KE_VLAN_TAG_SIZE 4
/**
* The overhead from MTU to max frame size.
* Considering QinQ packet, the VLAN tag needs to be counted twice.
*/
#define IPN3KE_ETH_OVERHEAD \
- (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + IPN3KE_VLAN_TAG_SIZE * 2)
+ (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + RTE_VLAN_HLEN * 2)
+#define IPN3KE_ETH_MAX_LEN (RTE_ETHER_MTU + IPN3KE_ETH_OVERHEAD)
#define IPN3KE_MAC_FRAME_SIZE_MAX 9728
#define IPN3KE_MAC_RX_FRAME_MAXLENGTH 0x00AE
#define IPN3KE_MAC_RX_FRAME_MAXLENGTH_MASK \
IPN3KE_MASK(0xFFFF, IPN3KE_MAC_RX_FRAME_MAXLENGTH_SHIFT)
+#define IPN3KE_25G_MAX_TX_SIZE_CONFIG 0x407
+#define IPN3KE_25G_MAX_RX_SIZE_CONFIG 0x506
+
+#define IPN3KE_10G_TX_FRAME_MAXLENGTH 0x002C
+#define IPN3KE_10G_RX_FRAME_MAXLENGTH 0x00AE
+
#define IPN3KE_REGISTER_WIDTH 32
/*Bits[2:0]: Configuration of TX statistics counters: