net/bnxt: add Tx TruFlow table config for P4 device
[dpdk.git] / drivers / net / ipn3ke / ipn3ke_representor.c
index 8d9ebef..de325c7 100644 (file)
@@ -12,7 +12,7 @@
 
 #include <rte_mbuf.h>
 #include <rte_sched.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
 #include <rte_spinlock.h>
 
 #include <rte_io.h>
@@ -50,11 +50,11 @@ ipn3ke_rpst_dev_infos_get(struct rte_eth_dev *ethdev,
        dev_info->speed_capa =
                (hw->retimer.mac_type ==
                        IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) ?
-               ETH_LINK_SPEED_10G :
+               RTE_ETH_LINK_SPEED_10G :
                ((hw->retimer.mac_type ==
                        IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) ?
-               ETH_LINK_SPEED_25G :
-               ETH_LINK_SPEED_AUTONEG);
+               RTE_ETH_LINK_SPEED_25G :
+               RTE_ETH_LINK_SPEED_AUTONEG);
 
        dev_info->max_rx_queues  = 1;
        dev_info->max_tx_queues  = 1;
@@ -67,36 +67,36 @@ ipn3ke_rpst_dev_infos_get(struct rte_eth_dev *ethdev,
        };
        dev_info->rx_queue_offload_capa = 0;
        dev_info->rx_offload_capa =
-               DEV_RX_OFFLOAD_VLAN_STRIP |
-               DEV_RX_OFFLOAD_QINQ_STRIP |
-               DEV_RX_OFFLOAD_IPV4_CKSUM |
-               DEV_RX_OFFLOAD_UDP_CKSUM |
-               DEV_RX_OFFLOAD_TCP_CKSUM |
-               DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
-               DEV_RX_OFFLOAD_VLAN_EXTEND |
-               DEV_RX_OFFLOAD_VLAN_FILTER |
-               DEV_RX_OFFLOAD_JUMBO_FRAME;
-
-       dev_info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE;
+               RTE_ETH_RX_OFFLOAD_VLAN_STRIP |
+               RTE_ETH_RX_OFFLOAD_QINQ_STRIP |
+               RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
+               RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
+               RTE_ETH_RX_OFFLOAD_TCP_CKSUM |
+               RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM |
+               RTE_ETH_RX_OFFLOAD_VLAN_EXTEND |
+               RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
+
+       dev_info->tx_queue_offload_capa = RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE;
        dev_info->tx_offload_capa =
-               DEV_TX_OFFLOAD_VLAN_INSERT |
-               DEV_TX_OFFLOAD_QINQ_INSERT |
-               DEV_TX_OFFLOAD_IPV4_CKSUM |
-               DEV_TX_OFFLOAD_UDP_CKSUM |
-               DEV_TX_OFFLOAD_TCP_CKSUM |
-               DEV_TX_OFFLOAD_SCTP_CKSUM |
-               DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
-               DEV_TX_OFFLOAD_TCP_TSO |
-               DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
-               DEV_TX_OFFLOAD_GRE_TNL_TSO |
-               DEV_TX_OFFLOAD_IPIP_TNL_TSO |
-               DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
-               DEV_TX_OFFLOAD_MULTI_SEGS |
+               RTE_ETH_TX_OFFLOAD_VLAN_INSERT |
+               RTE_ETH_TX_OFFLOAD_QINQ_INSERT |
+               RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
+               RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
+               RTE_ETH_TX_OFFLOAD_TCP_CKSUM |
+               RTE_ETH_TX_OFFLOAD_SCTP_CKSUM |
+               RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |
+               RTE_ETH_TX_OFFLOAD_TCP_TSO |
+               RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO |
+               RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO |
+               RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO |
+               RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO |
+               RTE_ETH_TX_OFFLOAD_MULTI_SEGS |
                dev_info->tx_queue_offload_capa;
 
        dev_info->dev_capa =
                RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |
                RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;
+       dev_info->dev_capa &= ~RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP;
 
        dev_info->switch_info.name = ethdev->device->name;
        dev_info->switch_info.domain_id = rpst->switch_domain_id;
@@ -193,7 +193,7 @@ ipn3ke_rpst_dev_start(struct rte_eth_dev *dev)
        return 0;
 }
 
-static void
+static int
 ipn3ke_rpst_dev_stop(struct rte_eth_dev *dev)
 {
        struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
@@ -206,14 +206,19 @@ ipn3ke_rpst_dev_stop(struct rte_eth_dev *dev)
                /* Disable the RX path */
                ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);
        }
+
+       return 0;
 }
 
-static void
+static int
 ipn3ke_rpst_dev_close(struct rte_eth_dev *dev)
 {
        struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
        struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
 
+       if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+               return 0;
+
        if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
                /* Disable the TX path */
                ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);
@@ -221,6 +226,8 @@ ipn3ke_rpst_dev_close(struct rte_eth_dev *dev)
                /* Disable the RX path */
                ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);
        }
+
+       return 0;
 }
 
 /*
@@ -281,11 +288,6 @@ ipn3ke_rpst_rx_queue_setup(__rte_unused struct rte_eth_dev *dev,
        return 0;
 }
 
-static void
-ipn3ke_rpst_rx_queue_release(__rte_unused void *rxq)
-{
-}
-
 static int
 ipn3ke_rpst_tx_queue_setup(__rte_unused struct rte_eth_dev *dev,
        __rte_unused uint16_t queue_idx, __rte_unused uint16_t nb_desc,
@@ -295,11 +297,6 @@ ipn3ke_rpst_tx_queue_setup(__rte_unused struct rte_eth_dev *dev,
        return 0;
 }
 
-static void
-ipn3ke_rpst_tx_queue_release(__rte_unused void *txq)
-{
-}
-
 /* Statistics collected by each port, VSI, VEB, and S-channel */
 struct ipn3ke_rpst_eth_stats {
        uint64_t tx_bytes;               /* gotc */
@@ -701,7 +698,7 @@ struct ipn3ke_rpst_hw_port_stats *hw_stats)
                &tmp,
                IPN3KE_25G_TX_STATISTICS_STATUS,
                port_id,
-               1);
+               0);
        if (tmp & IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
                tmp = 0x00000000;
                (*hw->f_mac_read)(hw,
@@ -2403,10 +2400,10 @@ ipn3ke_update_link(struct rte_rawdev *rawdev,
                                (uint64_t *)&link_speed);
        switch (link_speed) {
        case IFPGA_RAWDEV_LINK_SPEED_10GB:
-               link->link_speed = ETH_SPEED_NUM_10G;
+               link->link_speed = RTE_ETH_SPEED_NUM_10G;
                break;
        case IFPGA_RAWDEV_LINK_SPEED_25GB:
-               link->link_speed = ETH_SPEED_NUM_25G;
+               link->link_speed = RTE_ETH_SPEED_NUM_25G;
                break;
        default:
                IPN3KE_AFU_PMD_ERR("Unknown link speed info %u", link_speed);
@@ -2464,9 +2461,9 @@ ipn3ke_rpst_link_update(struct rte_eth_dev *ethdev,
 
        memset(&link, 0, sizeof(link));
 
-       link.link_duplex = ETH_LINK_FULL_DUPLEX;
+       link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
        link.link_autoneg = !(ethdev->data->dev_conf.link_speeds &
-                               ETH_LINK_SPEED_FIXED);
+                               RTE_ETH_LINK_SPEED_FIXED);
 
        rawdev = hw->rawdev;
        ipn3ke_update_link(rawdev, rpst->port_id, &link);
@@ -2522,9 +2519,9 @@ ipn3ke_rpst_link_check(struct ipn3ke_rpst *rpst)
 
        memset(&link, 0, sizeof(link));
 
-       link.link_duplex = ETH_LINK_FULL_DUPLEX;
+       link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
        link.link_autoneg = !(rpst->ethdev->data->dev_conf.link_speeds &
-                               ETH_LINK_SPEED_FIXED);
+                               RTE_ETH_LINK_SPEED_FIXED);
 
        rawdev = hw->rawdev;
        ipn3ke_update_link(rawdev, rpst->port_id, &link);
@@ -2598,7 +2595,8 @@ ipn3ke_rpst_scan_check(void)
        int ret;
 
        if (ipn3ke_rpst_scan_num == 1) {
-               ret = pthread_create(&ipn3ke_rpst_scan_thread,
+               ret = rte_ctrl_thread_create(&ipn3ke_rpst_scan_thread,
+                       "ipn3ke scanner",
                        NULL,
                        ipn3ke_rpst_scan_handle_request, NULL);
                if (ret) {
@@ -2770,12 +2768,6 @@ ipn3ke_rpst_mtu_set(struct rte_eth_dev *ethdev, uint16_t mtu)
        int ret = 0;
        struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
        struct rte_eth_dev_data *dev_data = ethdev->data;
-       uint32_t frame_size = mtu  + IPN3KE_ETH_OVERHEAD;
-
-       /* check if mtu is within the allowed range */
-       if (mtu < RTE_ETHER_MIN_MTU ||
-               frame_size > IPN3KE_MAC_FRAME_SIZE_MAX)
-               return -EINVAL;
 
        /* mtu setting is forbidden if port is start */
        /* make sure NIC port is stopped */
@@ -2793,15 +2785,6 @@ ipn3ke_rpst_mtu_set(struct rte_eth_dev *ethdev, uint16_t mtu)
                return -EBUSY;
        }
 
-       if (frame_size > RTE_ETHER_MAX_LEN)
-               dev_data->dev_conf.rxmode.offloads |=
-                       (uint64_t)(DEV_RX_OFFLOAD_JUMBO_FRAME);
-       else
-               dev_data->dev_conf.rxmode.offloads &=
-                       (uint64_t)(~DEV_RX_OFFLOAD_JUMBO_FRAME);
-
-       dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
-
        if (rpst->i40e_pf_eth) {
                ret = rpst->i40e_pf_eth->dev_ops->mtu_set(rpst->i40e_pf_eth,
                                                        mtu);
@@ -2813,11 +2796,9 @@ ipn3ke_rpst_mtu_set(struct rte_eth_dev *ethdev, uint16_t mtu)
 }
 
 static int
-ipn3ke_afu_filter_ctrl(struct rte_eth_dev *ethdev,
-       enum rte_filter_type filter_type, enum rte_filter_op filter_op,
-       void *arg)
+ipn3ke_afu_flow_ops_get(struct rte_eth_dev *ethdev,
+                       const struct rte_flow_ops **ops)
 {
-       int ret = 0;
        struct ipn3ke_hw *hw;
        struct ipn3ke_rpst *rpst;
 
@@ -2828,27 +2809,13 @@ ipn3ke_afu_filter_ctrl(struct rte_eth_dev *ethdev,
        rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
 
        if (hw->acc_flow)
-               switch (filter_type) {
-               case RTE_ETH_FILTER_GENERIC:
-                       if (filter_op != RTE_ETH_FILTER_GET)
-                               return -EINVAL;
-                       *(const void **)arg = &ipn3ke_flow_ops;
-                       break;
-               default:
-                       IPN3KE_AFU_PMD_WARN("Filter type (%d) not supported",
-                                       filter_type);
-                       ret = -EINVAL;
-                       break;
-               }
+               *ops = &ipn3ke_flow_ops;
        else if (rpst->i40e_pf_eth)
-               (*rpst->i40e_pf_eth->dev_ops->filter_ctrl)(ethdev,
-                                                       filter_type,
-                                                       filter_op,
-                                                       arg);
+               (*rpst->i40e_pf_eth->dev_ops->flow_ops_get)(ethdev, ops);
        else
                return -EINVAL;
 
-       return ret;
+       return 0;
 }
 
 static const struct eth_dev_ops ipn3ke_rpst_dev_ops = {
@@ -2866,16 +2833,14 @@ static const struct eth_dev_ops ipn3ke_rpst_dev_ops = {
        .stats_reset          = ipn3ke_rpst_stats_reset,
        .xstats_reset         = ipn3ke_rpst_stats_reset,
 
-       .filter_ctrl          = ipn3ke_afu_filter_ctrl,
+       .flow_ops_get         = ipn3ke_afu_flow_ops_get,
 
        .rx_queue_start       = ipn3ke_rpst_rx_queue_start,
        .rx_queue_stop        = ipn3ke_rpst_rx_queue_stop,
        .tx_queue_start       = ipn3ke_rpst_tx_queue_start,
        .tx_queue_stop        = ipn3ke_rpst_tx_queue_stop,
        .rx_queue_setup       = ipn3ke_rpst_rx_queue_setup,
-       .rx_queue_release     = ipn3ke_rpst_rx_queue_release,
        .tx_queue_setup       = ipn3ke_rpst_tx_queue_setup,
-       .tx_queue_release     = ipn3ke_rpst_tx_queue_release,
 
        .dev_set_link_up      = ipn3ke_rpst_dev_set_link_up,
        .dev_set_link_down    = ipn3ke_rpst_dev_set_link_down,
@@ -2958,7 +2923,8 @@ ipn3ke_rpst_init(struct rte_eth_dev *ethdev, void *init_params)
                return -ENODEV;
        }
 
-       ethdev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
+       ethdev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR |
+                                       RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
 
        rte_spinlock_lock(&ipn3ke_link_notify_list_lk);
        TAILQ_INSERT_TAIL(&ipn3ke_rpst_list, rpst, next);