net/af_packet: handle possible null pointer

[dpdk.git] / drivers / net / ixgbe / base / ixgbe_82598.c

diff --git a/drivers/net/ixgbe/base/ixgbe_82598.c b/drivers/net/ixgbe/base/ixgbe_82598.c
index 4e06550..d64abb2 100644 (file)
--- a/drivers/net/ixgbe/base/ixgbe_82598.c
+++ b/drivers/net/ixgbe/base/ixgbe_82598.c
@@ -1,6 +1,6 @@
 /*******************************************************************************
 
-Copyright (c) 2001-2014, Intel Corporation
+Copyright (c) 2001-2015, Intel Corporation
 All rights reserved.
 
 Redistribution and use in source and binary forms, with or without
@@ -259,6 +259,8 @@ s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw)
        DEBUGFUNC("ixgbe_start_hw_82598");
 
        ret_val = ixgbe_start_hw_generic(hw);
+       if (ret_val)
+               return ret_val;
 
        /* Disable relaxed ordering */
        for (i = 0; ((i < hw->mac.max_tx_queues) &&
@@ -277,8 +279,7 @@ s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw)
        }
 
        /* set the completion timeout for interface */
-       if (ret_val == IXGBE_SUCCESS)
-               ixgbe_set_pcie_completion_timeout(hw);
+       ixgbe_set_pcie_completion_timeout(hw);
 
        return ret_val;
 }
@@ -658,7 +659,7 @@ STATIC s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
                hw->phy.ops.read_reg(hw, 0xC00C, IXGBE_TWINAX_DEV,
                                     &adapt_comp_reg);
                if (link_up_wait_to_complete) {
-                       for (i = 0; i < IXGBE_LINK_UP_TIME; i++) {
+                       for (i = 0; i < hw->mac.max_link_up_time; i++) {
                                if ((link_reg & 1) &&
                                    ((adapt_comp_reg & 1) == 0)) {
                                        *link_up = true;
@@ -687,7 +688,7 @@ STATIC s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
 
        links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
        if (link_up_wait_to_complete) {
-               for (i = 0; i < IXGBE_LINK_UP_TIME; i++) {
+               for (i = 0; i < hw->mac.max_link_up_time; i++) {
                        if (links_reg & IXGBE_LINKS_UP) {
                                *link_up = true;
                                break;
@@ -994,17 +995,20 @@ STATIC s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
  *  @vlan: VLAN id to write to VLAN filter
  *  @vind: VMDq output index that maps queue to VLAN id in VFTA
  *  @vlan_on: boolean flag to turn on/off VLAN in VFTA
+ *  @vlvf_bypass: boolean flag - unused
  *
  *  Turn on/off specified VLAN in the VLAN filter table.
  **/
 s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind,
-                        bool vlan_on)
+                        bool vlan_on, bool vlvf_bypass)
 {
        u32 regindex;
        u32 bitindex;
        u32 bits;
        u32 vftabyte;
 
+       UNREFERENCED_1PARAMETER(vlvf_bypass);
+
        DEBUGFUNC("ixgbe_set_vfta_82598");
 
        if (vlan > 4095)
@@ -1218,9 +1222,9 @@ STATIC s32 ixgbe_read_i2c_sff8472_82598(struct ixgbe_hw *hw, u8 byte_offset,
  *
  *  Determines physical layer capabilities of the current configuration.
  **/
-u32 ixgbe_get_supported_physical_layer_82598(struct ixgbe_hw *hw)
+u64 ixgbe_get_supported_physical_layer_82598(struct ixgbe_hw *hw)
 {
-       u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
+       u64 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
        u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
        u32 pma_pmd_10g = autoc & IXGBE_AUTOC_10G_PMA_PMD_MASK;
        u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;