ixgbe/base: add X550em LPLU support
[dpdk.git] / drivers / net / ixgbe / base / ixgbe_api.c
index c704b69..ff0cd70 100644 (file)
@@ -1,6 +1,6 @@
 /*******************************************************************************
 
-Copyright (c) 2001-2014, Intel Corporation
+Copyright (c) 2001-2015, Intel Corporation
 All rights reserved.
 
 Redistribution and use in source and binary forms, with or without
@@ -659,6 +659,22 @@ s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
                               IXGBE_NOT_IMPLEMENTED);
 }
 
+/**
+ *  ixgbe_setup_mac_link - Set link speed
+ *  @hw: pointer to hardware structure
+ *  @speed: new link speed
+ *
+ *  Configures link settings.  Restarts the link.
+ *  Performs autonegotiation if needed.
+ **/
+s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
+                        bool autoneg_wait_to_complete)
+{
+       return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed,
+                              autoneg_wait_to_complete),
+                              IXGBE_NOT_IMPLEMENTED);
+}
+
 /**
  *  ixgbe_get_link_capabilities - Returns link capabilities
  *  @hw: pointer to hardware structure
@@ -1251,6 +1267,19 @@ void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
                hw->mac.ops.restore_mdd_vf(hw, vf);
 }
 
+/**
+ *  ixgbe_enter_lplu - Transition to low power states
+ *  @hw: pointer to hardware structure
+ *
+ * Configures Low Power Link Up on transition to low power states
+ * (from D0 to non-D0).
+ **/
+s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)
+{
+       return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),
+                               IXGBE_NOT_IMPLEMENTED);
+}
+
 /**
  *  ixgbe_read_analog_reg8 - Reads 8 bit analog register
  *  @hw: pointer to hardware structure
@@ -1308,6 +1337,23 @@ s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
                               dev_addr, data), IXGBE_NOT_IMPLEMENTED);
 }
 
+/**
+ *  ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address
+ *  @hw: pointer to hardware structure
+ *  @byte_offset: byte offset to read
+ *  @dev_addr: I2C bus address to read from
+ *  @data: value read
+ *
+ *  Performs byte read operation to SFP module's EEPROM over I2C interface.
+ **/
+s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
+                                u8 dev_addr, u8 *data)
+{
+       return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked,
+                              (hw, byte_offset, dev_addr, data),
+                              IXGBE_NOT_IMPLEMENTED);
+}
+
 /**
  * ixgbe_read_i2c_combined - Perform I2C read combined operation
  * @hw: pointer to the hardware structure
@@ -1323,6 +1369,23 @@ s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
                               reg, val), IXGBE_NOT_IMPLEMENTED);
 }
 
+/**
+ * ixgbe_read_i2c_combined_unlocked - Perform I2C read combined operation
+ * @hw: pointer to the hardware structure
+ * @addr: I2C bus address to read from
+ * @reg: I2C device register to read from
+ * @val: pointer to location to receive read value
+ *
+ * Returns an error code on error.
+ **/
+s32 ixgbe_read_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
+                                    u16 *val)
+{
+       return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined_unlocked,
+                              (hw, addr, reg, val),
+                              IXGBE_NOT_IMPLEMENTED);
+}
+
 /**
  *  ixgbe_write_i2c_byte - Writes 8 bit word over I2C
  *  @hw: pointer to hardware structure
@@ -1340,6 +1403,24 @@ s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
                               dev_addr, data), IXGBE_NOT_IMPLEMENTED);
 }
 
+/**
+ *  ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C
+ *  @hw: pointer to hardware structure
+ *  @byte_offset: byte offset to write
+ *  @dev_addr: I2C bus address to write to
+ *  @data: value to write
+ *
+ *  Performs byte write operation to SFP module's EEPROM over I2C interface
+ *  at a specified device address.
+ **/
+s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
+                                 u8 dev_addr, u8 data)
+{
+       return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked,
+                              (hw, byte_offset, dev_addr, data),
+                              IXGBE_NOT_IMPLEMENTED);
+}
+
 /**
  * ixgbe_write_i2c_combined - Perform I2C write combined operation
  * @hw: pointer to the hardware structure
@@ -1355,6 +1436,22 @@ s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
                               reg, val), IXGBE_NOT_IMPLEMENTED);
 }
 
+/**
+ * ixgbe_write_i2c_combined_unlocked - Perform I2C write combined operation
+ * @hw: pointer to the hardware structure
+ * @addr: I2C bus address to write to
+ * @reg: I2C device register to write to
+ * @val: value to write
+ *
+ * Returns an error code on error.
+ **/
+s32 ixgbe_write_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
+                                     u16 val)
+{
+       return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined_unlocked,
+                              (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
+}
+
 /**
  *  ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
  *  @hw: pointer to hardware structure
@@ -1475,3 +1572,16 @@ void ixgbe_enable_rx(struct ixgbe_hw *hw)
        if (hw->mac.ops.enable_rx)
                hw->mac.ops.enable_rx(hw);
 }
+
+/**
+ *  ixgbe_set_rate_select_speed - Set module link speed
+ *  @hw: pointer to hardware structure
+ *  @speed: link speed to set
+ *
+ *  Set module link speed via the rate select.
+ */
+void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
+{
+       if (hw->mac.ops.set_rate_select_speed)
+               hw->mac.ops.set_rate_select_speed(hw, speed);
+}