STATIC void ixgbe_i2c_start(struct ixgbe_hw *hw);
STATIC void ixgbe_i2c_stop(struct ixgbe_hw *hw);
-STATIC s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data);
+STATIC void ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data);
STATIC s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data);
STATIC s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw);
-STATIC s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data);
+STATIC void ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data);
STATIC s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data);
STATIC void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
STATIC void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
*/
STATIC s32 ixgbe_in_i2c_byte_ack(struct ixgbe_hw *hw, u8 *byte)
{
- s32 status;
-
- status = ixgbe_clock_in_i2c_byte(hw, byte);
- if (status)
- return status;
+ ixgbe_clock_in_i2c_byte(hw, byte);
/* ACK */
return ixgbe_clock_out_i2c_bit(hw, false);
}
if (ixgbe_in_i2c_byte_ack(hw, &low_bits))
goto fail;
/* Get csum */
- if (ixgbe_clock_in_i2c_byte(hw, &csum_byte))
- goto fail;
+ ixgbe_clock_in_i2c_byte(hw, &csum_byte);
/* NACK */
if (ixgbe_clock_out_i2c_bit(hw, false))
goto fail;
return status;
}
+/**
+ * ixgbe_restart_auto_neg - Restart auto negotiation on the PHY
+ * @hw: pointer to hardware structure
+ **/
+void ixgbe_restart_auto_neg(struct ixgbe_hw *hw)
+{
+ u16 autoneg_reg;
+
+ /* Check if PHY reset is blocked by MNG FW */
+ if (ixgbe_check_reset_blocked(hw))
+ return;
+
+ /* Restart PHY auto-negotiation. */
+ hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,
+ IXGBE_MDIO_AUTO_NEG_DEV_TYPE, &autoneg_reg);
+ autoneg_reg |= IXGBE_MII_RESTART;
+ hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,
+ IXGBE_MDIO_AUTO_NEG_DEV_TYPE, autoneg_reg);
+}
+
/**
* ixgbe_read_phy_mdi - Reads a value from a specified PHY register without
* the SWFW lock
IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
autoneg_reg);
- /* Blocked by MNG FW so don't reset PHY */
- if (ixgbe_check_reset_blocked(hw))
- return status;
-
- /* Restart PHY auto-negotiation. */
- hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,
- IXGBE_MDIO_AUTO_NEG_DEV_TYPE, &autoneg_reg);
-
- autoneg_reg |= IXGBE_MII_RESTART;
-
- hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,
- IXGBE_MDIO_AUTO_NEG_DEV_TYPE, autoneg_reg);
-
+ ixgbe_restart_auto_neg(hw);
return status;
}
hw->phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL;
switch (hw->mac.type) {
- case ixgbe_mac_X550:
- hw->phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL;
- hw->phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL;
- break;
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
hw->phy.speeds_supported &= ~IXGBE_LINK_SPEED_100_FULL;
autoneg_reg);
}
- /* Blocked by MNG FW so don't reset PHY */
- if (ixgbe_check_reset_blocked(hw))
- return status;
-
- /* Restart PHY auto-negotiation. */
- hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,
- IXGBE_MDIO_AUTO_NEG_DEV_TYPE, &autoneg_reg);
-
- autoneg_reg |= IXGBE_MII_RESTART;
-
- hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,
- IXGBE_MDIO_AUTO_NEG_DEV_TYPE, autoneg_reg);
-
+ ixgbe_restart_auto_neg(hw);
return status;
}
if (status != IXGBE_SUCCESS)
goto fail;
- status = ixgbe_clock_in_i2c_byte(hw, data);
- if (status != IXGBE_SUCCESS)
- goto fail;
+ ixgbe_clock_in_i2c_byte(hw, data);
status = ixgbe_clock_out_i2c_bit(hw, nack);
if (status != IXGBE_SUCCESS)
*
* Clocks in one byte data via I2C data/clock
**/
-STATIC s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data)
+STATIC void ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data)
{
s32 i;
bool bit = 0;
ixgbe_clock_in_i2c_bit(hw, &bit);
*data |= bit << i;
}
-
- return IXGBE_SUCCESS;
}
/**
*
* Clocks in one bit via I2C data/clock
**/
-STATIC s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data)
+STATIC void ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data)
{
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
/* Minimum low period of clock is 4.7 us */
usec_delay(IXGBE_I2C_T_LOW);
-
- return IXGBE_SUCCESS;
}
/**