net/ixgbe/base: fix C++ build
[dpdk.git] / drivers / net / ixgbe / base / ixgbe_phy.c
index bc4d88c..ed1b14f 100644 (file)
@@ -109,8 +109,8 @@ STATIC u8 ixgbe_ones_comp_byte_add(u8 add1, u8 add2)
  *
  * Returns an error code on error.
  */
-STATIC s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr,
-                                              u16 reg, u16 *val, bool lock)
+s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg,
+                                       u16 *val, bool lock)
 {
        u32 swfw_mask = hw->phy.phy_semaphore_mask;
        int max_retry = 10;
@@ -179,37 +179,6 @@ fail:
        return IXGBE_ERR_I2C;
 }
 
-/**
- * ixgbe_read_i2c_combined_generic - Perform I2C read combined operation
- * @hw: pointer to the hardware structure
- * @addr: I2C bus address to read from
- * @reg: I2C device register to read from
- * @val: pointer to location to receive read value
- *
- * Returns an error code on error.
- **/
-STATIC s32 ixgbe_read_i2c_combined_generic(struct ixgbe_hw *hw, u8 addr,
-                                          u16 reg, u16 *val)
-{
-       return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, true);
-}
-
-/**
- * ixgbe_read_i2c_combined_generic_unlocked - Do I2C read combined operation
- * @hw: pointer to the hardware structure
- * @addr: I2C bus address to read from
- * @reg: I2C device register to read from
- * @val: pointer to location to receive read value
- *
- * Returns an error code on error.
- **/
-STATIC s32
-ixgbe_read_i2c_combined_generic_unlocked(struct ixgbe_hw *hw, u8 addr,
-                                        u16 reg, u16 *val)
-{
-       return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, false);
-}
-
 /**
  * ixgbe_write_i2c_combined_generic_int - Perform I2C write combined operation
  * @hw: pointer to the hardware structure
@@ -220,8 +189,8 @@ ixgbe_read_i2c_combined_generic_unlocked(struct ixgbe_hw *hw, u8 addr,
  *
  * Returns an error code on error.
  */
-STATIC s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr,
-                                               u16 reg, u16 val, bool lock)
+s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg,
+                                        u16 val, bool lock)
 {
        u32 swfw_mask = hw->phy.phy_semaphore_mask;
        int max_retry = 1;
@@ -275,37 +244,6 @@ fail:
        return IXGBE_ERR_I2C;
 }
 
-/**
- * ixgbe_write_i2c_combined_generic - Perform I2C write combined operation
- * @hw: pointer to the hardware structure
- * @addr: I2C bus address to write to
- * @reg: I2C device register to write to
- * @val: value to write
- *
- * Returns an error code on error.
- **/
-STATIC s32 ixgbe_write_i2c_combined_generic(struct ixgbe_hw *hw,
-                                           u8 addr, u16 reg, u16 val)
-{
-       return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, true);
-}
-
-/**
- * ixgbe_write_i2c_combined_generic_unlocked - Do I2C write combined operation
- * @hw: pointer to the hardware structure
- * @addr: I2C bus address to write to
- * @reg: I2C device register to write to
- * @val: value to write
- *
- * Returns an error code on error.
- **/
-STATIC s32
-ixgbe_write_i2c_combined_generic_unlocked(struct ixgbe_hw *hw,
-                                         u8 addr, u16 reg, u16 val)
-{
-       return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, false);
-}
-
 /**
  *  ixgbe_init_phy_ops_generic - Inits PHY function ptrs
  *  @hw: pointer to the hardware structure
@@ -337,12 +275,6 @@ s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw)
        phy->ops.i2c_bus_clear = ixgbe_i2c_bus_clear;
        phy->ops.identify_sfp = ixgbe_identify_module_generic;
        phy->sfp_type = ixgbe_sfp_type_unknown;
-       phy->ops.read_i2c_combined = ixgbe_read_i2c_combined_generic;
-       phy->ops.write_i2c_combined = ixgbe_write_i2c_combined_generic;
-       phy->ops.read_i2c_combined_unlocked =
-                               ixgbe_read_i2c_combined_generic_unlocked;
-       phy->ops.write_i2c_combined_unlocked =
-                               ixgbe_write_i2c_combined_generic_unlocked;
        phy->ops.read_i2c_byte_unlocked = ixgbe_read_i2c_byte_generic_unlocked;
        phy->ops.write_i2c_byte_unlocked =
                                ixgbe_write_i2c_byte_generic_unlocked;
@@ -522,6 +454,9 @@ enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id)
        case X557_PHY_ID:
                phy_type = ixgbe_phy_x550em_ext_t;
                break;
+       case IXGBE_M88E1500_E_PHY_ID:
+               phy_type = ixgbe_phy_m88;
+               break;
        default:
                phy_type = ixgbe_phy_unknown;
                break;
@@ -683,13 +618,12 @@ s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
 
        DEBUGFUNC("ixgbe_read_phy_reg_generic");
 
-       if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == IXGBE_SUCCESS) {
-               status = ixgbe_read_phy_reg_mdi(hw, reg_addr, device_type,
-                                               phy_data);
-               hw->mac.ops.release_swfw_sync(hw, gssr);
-       } else {
-               status = IXGBE_ERR_SWFW_SYNC;
-       }
+       if (hw->mac.ops.acquire_swfw_sync(hw, gssr))
+               return IXGBE_ERR_SWFW_SYNC;
+
+       status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data);
+
+       hw->mac.ops.release_swfw_sync(hw, gssr);
 
        return status;
 }