net/af_packet: handle possible null pointer

[dpdk.git] / drivers / net / ixgbe / base / ixgbe_type.h

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 9ec17a9..bda8558 100644 (file)
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -146,6 +146,7 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_DEV_ID_X550EM_X_SFP              0x15AC
 #define IXGBE_DEV_ID_X550EM_X_10G_T            0x15AD
 #define IXGBE_DEV_ID_X550EM_X_1G_T             0x15AE
+#define IXGBE_DEV_ID_X550EM_X_XFI              0x15B0
 #define IXGBE_DEV_ID_X550_VF_HV                        0x1564
 #define IXGBE_DEV_ID_X550_VF                   0x1565
 #define IXGBE_DEV_ID_X550EM_A_VF               0x15C5
@@ -1045,7 +1046,7 @@ struct ixgbe_dmac_config {
 #define IXGBE_FTFT             0x09400 /* 0x9400-0x97FC */
 #define IXGBE_METF(_i)         (0x05190 + ((_i) * 4)) /* 4 of these (0-3) */
 #define IXGBE_MDEF_EXT(_i)     (0x05160 + ((_i) * 4)) /* 8 of these (0-7) */
-#define IXGBE_LSWFW            0x15014
+#define IXGBE_LSWFW            0x15F14
 #define IXGBE_BMCIP(_i)                (0x05050 + ((_i) * 4)) /* 0x5050-0x505C */
 #define IXGBE_BMCIPVAL         0x05060
 #define IXGBE_BMCIP_IPADDR_TYPE        0x00000001
@@ -2621,6 +2622,7 @@ enum {
 #define IXGBE_MRQC_VMDQRSS64EN 0x0000000B /* VMDq2 64 pools w/ RSS */
 #define IXGBE_MRQC_VMDQRT8TCEN 0x0000000C /* VMDq2/RT 16 pool 8 TC */
 #define IXGBE_MRQC_VMDQRT4TCEN 0x0000000D /* VMDq2/RT 32 pool 4 TC */
+#define IXGBE_MRQC_L3L4TXSWEN  0x00008000 /* Enable L3/L4 Tx switch */
 #define IXGBE_MRQC_RSS_FIELD_MASK      0xFFFF0000
 #define IXGBE_MRQC_RSS_FIELD_IPV4_TCP  0x00010000
 #define IXGBE_MRQC_RSS_FIELD_IPV4      0x00020000
@@ -3408,24 +3410,25 @@ typedef u32 ixgbe_link_speed;
                                         IXGBE_LINK_SPEED_10GB_FULL)
 
 /* Physical layer type */
-typedef u32 ixgbe_physical_layer;
+typedef u64 ixgbe_physical_layer;
 #define IXGBE_PHYSICAL_LAYER_UNKNOWN           0
-#define IXGBE_PHYSICAL_LAYER_10GBASE_T         0x0001
-#define IXGBE_PHYSICAL_LAYER_1000BASE_T                0x0002
-#define IXGBE_PHYSICAL_LAYER_100BASE_TX                0x0004
-#define IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU       0x0008
-#define IXGBE_PHYSICAL_LAYER_10GBASE_LR                0x0010
-#define IXGBE_PHYSICAL_LAYER_10GBASE_LRM       0x0020
-#define IXGBE_PHYSICAL_LAYER_10GBASE_SR                0x0040
-#define IXGBE_PHYSICAL_LAYER_10GBASE_KX4       0x0080
-#define IXGBE_PHYSICAL_LAYER_10GBASE_CX4       0x0100
-#define IXGBE_PHYSICAL_LAYER_1000BASE_KX       0x0200
-#define IXGBE_PHYSICAL_LAYER_1000BASE_BX       0x0400
-#define IXGBE_PHYSICAL_LAYER_10GBASE_KR                0x0800
-#define IXGBE_PHYSICAL_LAYER_10GBASE_XAUI      0x1000
-#define IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA     0x2000
-#define IXGBE_PHYSICAL_LAYER_1000BASE_SX       0x4000
-#define IXGBE_PHYSICAL_LAYER_10BASE_T          0x8000
+#define IXGBE_PHYSICAL_LAYER_10GBASE_T         0x00001
+#define IXGBE_PHYSICAL_LAYER_1000BASE_T                0x00002
+#define IXGBE_PHYSICAL_LAYER_100BASE_TX                0x00004
+#define IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU       0x00008
+#define IXGBE_PHYSICAL_LAYER_10GBASE_LR                0x00010
+#define IXGBE_PHYSICAL_LAYER_10GBASE_LRM       0x00020
+#define IXGBE_PHYSICAL_LAYER_10GBASE_SR                0x00040
+#define IXGBE_PHYSICAL_LAYER_10GBASE_KX4       0x00080
+#define IXGBE_PHYSICAL_LAYER_10GBASE_CX4       0x00100
+#define IXGBE_PHYSICAL_LAYER_1000BASE_KX       0x00200
+#define IXGBE_PHYSICAL_LAYER_1000BASE_BX       0x00400
+#define IXGBE_PHYSICAL_LAYER_10GBASE_KR                0x00800
+#define IXGBE_PHYSICAL_LAYER_10GBASE_XAUI      0x01000
+#define IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA     0x02000
+#define IXGBE_PHYSICAL_LAYER_1000BASE_SX       0x04000
+#define IXGBE_PHYSICAL_LAYER_10BASE_T          0x08000
+#define IXGBE_PHYSICAL_LAYER_2500BASE_KX       0x10000
 
 /* Flow Control Data Sheet defined values
  * Calculation and defines taken from 802.1bb Annex O
@@ -3644,7 +3647,9 @@ enum ixgbe_phy_type {
        ixgbe_phy_aq,
        ixgbe_phy_x550em_kr,
        ixgbe_phy_x550em_kx4,
+       ixgbe_phy_x550em_xfi,
        ixgbe_phy_x550em_ext_t,
+       ixgbe_phy_ext_1g_t,
        ixgbe_phy_cu_unknown,
        ixgbe_phy_qt,
        ixgbe_phy_xaui,
@@ -3720,14 +3725,6 @@ enum ixgbe_fc_mode {
        ixgbe_fc_default
 };
 
-/* Master/slave control */
-enum ixgbe_ms_type {
-       ixgbe_ms_hw_default = 0,
-       ixgbe_ms_force_master,
-       ixgbe_ms_force_slave,
-       ixgbe_ms_auto
-};
-
 /* Smart Speed Settings */
 #define IXGBE_SMARTSPEED_MAX_RETRIES   3
 enum ixgbe_smart_speed {
@@ -3910,7 +3907,7 @@ struct ixgbe_mac_operations {
        s32 (*clear_hw_cntrs)(struct ixgbe_hw *);
        void (*enable_relaxed_ordering)(struct ixgbe_hw *);
        enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *);
-       u32 (*get_supported_physical_layer)(struct ixgbe_hw *);
+       u64 (*get_supported_physical_layer)(struct ixgbe_hw *);
        s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *);
        s32 (*get_san_mac_addr)(struct ixgbe_hw *, u8 *);
        s32 (*set_san_mac_addr)(struct ixgbe_hw *, u8 *);