net/ixgbe/base: add flow control autoneg for X550a

[dpdk.git] / drivers / net / ixgbe / base / ixgbe_type.h

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index f1379be..be51bee 100644 (file)
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -133,12 +133,14 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_DEV_ID_X550EM_A_KR               0x15C2
 #define IXGBE_DEV_ID_X550EM_A_KR_L             0x15C3
 #define IXGBE_DEV_ID_X550EM_A_SFP_N            0x15C4
-#define IXGBE_DEV_ID_X550EM_A_1G_T             0x15C6
-#define IXGBE_DEV_ID_X550EM_A_1G_T_L           0x15C7
+#define IXGBE_DEV_ID_X550EM_A_SGMII            0x15C6
+#define IXGBE_DEV_ID_X550EM_A_SGMII_L          0x15C7
 #define IXGBE_DEV_ID_X550EM_A_10G_T            0x15C8
 #define IXGBE_DEV_ID_X550EM_A_QSFP             0x15CA
 #define IXGBE_DEV_ID_X550EM_A_QSFP_N           0x15CC
 #define IXGBE_DEV_ID_X550EM_A_SFP              0x15CE
+#define IXGBE_DEV_ID_X550EM_A_1G_T             0x15E4
+#define IXGBE_DEV_ID_X550EM_A_1G_T_L           0x15E5
 #define IXGBE_DEV_ID_X550EM_X_KX4              0x15AA
 #define IXGBE_DEV_ID_X550EM_X_KR               0x15AB
 #define IXGBE_DEV_ID_X550EM_X_SFP              0x15AC
@@ -194,7 +196,7 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_FLA_X540         IXGBE_FLA
 #define IXGBE_FLA_X550         IXGBE_FLA
 #define IXGBE_FLA_X550EM_x     IXGBE_FLA
-#define IXGBE_FLA_X550EM_a     0x15F6C
+#define IXGBE_FLA_X550EM_a     0x15F68
 #define IXGBE_FLA_BY_MAC(_hw)  IXGBE_BY_MAC((_hw), FLA)
 
 #define IXGBE_EEMNGCTL 0x10110
@@ -1078,16 +1080,40 @@ struct ixgbe_dmac_config {
 #define IXGBE_PCIEPIPEDAT      0x11008
 #define IXGBE_GSCL_1           0x11010
 #define IXGBE_GSCL_2           0x11014
+#define IXGBE_GSCL_1_X540      IXGBE_GSCL_1
+#define IXGBE_GSCL_2_X540      IXGBE_GSCL_2
 #define IXGBE_GSCL_3           0x11018
 #define IXGBE_GSCL_4           0x1101C
 #define IXGBE_GSCN_0           0x11020
 #define IXGBE_GSCN_1           0x11024
 #define IXGBE_GSCN_2           0x11028
 #define IXGBE_GSCN_3           0x1102C
+#define IXGBE_GSCN_0_X540      IXGBE_GSCN_0
+#define IXGBE_GSCN_1_X540      IXGBE_GSCN_1
+#define IXGBE_GSCN_2_X540      IXGBE_GSCN_2
+#define IXGBE_GSCN_3_X540      IXGBE_GSCN_3
 #define IXGBE_FACTPS           0x10150
 #define IXGBE_FACTPS_X540      IXGBE_FACTPS
+#define IXGBE_GSCL_1_X550      0x11800
+#define IXGBE_GSCL_2_X550      0x11804
+#define IXGBE_GSCL_1_X550EM_x  IXGBE_GSCL_1_X550
+#define IXGBE_GSCL_2_X550EM_x  IXGBE_GSCL_2_X550
+#define IXGBE_GSCN_0_X550      0x11820
+#define IXGBE_GSCN_1_X550      0x11824
+#define IXGBE_GSCN_2_X550      0x11828
+#define IXGBE_GSCN_3_X550      0x1182C
+#define IXGBE_GSCN_0_X550EM_x  IXGBE_GSCN_0_X550
+#define IXGBE_GSCN_1_X550EM_x  IXGBE_GSCN_1_X550
+#define IXGBE_GSCN_2_X550EM_x  IXGBE_GSCN_2_X550
+#define IXGBE_GSCN_3_X550EM_x  IXGBE_GSCN_3_X550
 #define IXGBE_FACTPS_X550      IXGBE_FACTPS
 #define IXGBE_FACTPS_X550EM_x  IXGBE_FACTPS
+#define IXGBE_GSCL_1_X550EM_a  IXGBE_GSCL_1_X550
+#define IXGBE_GSCL_2_X550EM_a  IXGBE_GSCL_2_X550
+#define IXGBE_GSCN_0_X550EM_a  IXGBE_GSCN_0_X550
+#define IXGBE_GSCN_1_X550EM_a  IXGBE_GSCN_1_X550
+#define IXGBE_GSCN_2_X550EM_a  IXGBE_GSCN_2_X550
+#define IXGBE_GSCN_3_X550EM_a  IXGBE_GSCN_3_X550
 #define IXGBE_FACTPS_X550EM_a  0x15FEC
 #define IXGBE_FACTPS_BY_MAC(_hw)       IXGBE_BY_MAC((_hw), FACTPS)
 
@@ -1124,6 +1150,10 @@ struct ixgbe_dmac_config {
 #define IXGBE_GSCL_6_82599     0x11034
 #define IXGBE_GSCL_7_82599     0x11038
 #define IXGBE_GSCL_8_82599     0x1103C
+#define IXGBE_GSCL_5_X540      IXGBE_GSCL_5_82599
+#define IXGBE_GSCL_6_X540      IXGBE_GSCL_6_82599
+#define IXGBE_GSCL_7_X540      IXGBE_GSCL_7_82599
+#define IXGBE_GSCL_8_X540      IXGBE_GSCL_8_82599
 #define IXGBE_PHYADR_82599     0x11040
 #define IXGBE_PHYDAT_82599     0x11044
 #define IXGBE_PHYCTL_82599     0x11048
@@ -1134,10 +1164,22 @@ struct ixgbe_dmac_config {
 #define IXGBE_CIAD_82599       IXGBE_CIAD
 #define IXGBE_CIAA_X540                IXGBE_CIAA
 #define IXGBE_CIAD_X540                IXGBE_CIAD
+#define IXGBE_GSCL_5_X550      0x11810
+#define IXGBE_GSCL_6_X550      0x11814
+#define IXGBE_GSCL_7_X550      0x11818
+#define IXGBE_GSCL_8_X550      0x1181C
+#define IXGBE_GSCL_5_X550EM_x  IXGBE_GSCL_5_X550
+#define IXGBE_GSCL_6_X550EM_x  IXGBE_GSCL_6_X550
+#define IXGBE_GSCL_7_X550EM_x  IXGBE_GSCL_7_X550
+#define IXGBE_GSCL_8_X550EM_x  IXGBE_GSCL_8_X550
 #define IXGBE_CIAA_X550                0x11508
 #define IXGBE_CIAD_X550                0x11510
 #define IXGBE_CIAA_X550EM_x    IXGBE_CIAA_X550
 #define IXGBE_CIAD_X550EM_x    IXGBE_CIAD_X550
+#define IXGBE_GSCL_5_X550EM_a  IXGBE_GSCL_5_X550
+#define IXGBE_GSCL_6_X550EM_a  IXGBE_GSCL_6_X550
+#define IXGBE_GSCL_7_X550EM_a  IXGBE_GSCL_7_X550
+#define IXGBE_GSCL_8_X550EM_a  IXGBE_GSCL_8_X550
 #define IXGBE_CIAA_X550EM_a    IXGBE_CIAA_X550
 #define IXGBE_CIAD_X550EM_a    IXGBE_CIAD_X550
 #define IXGBE_CIAA_BY_MAC(_hw) IXGBE_BY_MAC((_hw), CIAA)
@@ -3008,6 +3050,12 @@ enum ixgbe_fdir_pballoc_type {
 
 /* Host Interface Command Structures */
 
+#ifdef C99
+#pragma pack(push, 1)
+#else
+#pragma pack(1)
+#endif /* C99 */
+
 struct ixgbe_hic_hdr {
        u8 cmd;
        u8 buf_len;
@@ -3085,17 +3133,22 @@ struct ixgbe_hic_internal_phy_req {
        struct ixgbe_hic_hdr hdr;
        u8 port_number;
        u8 command_type;
-       u16 address;
+       __be16 address;
        u16 rsv1;
-       u32 write_data;
+       __le32 write_data;
        u16 pad;
 };
 
 struct ixgbe_hic_internal_phy_resp {
        struct ixgbe_hic_hdr hdr;
-       u32 read_data;
+       __le32 read_data;
 };
 
+#ifdef C99
+#pragma pack(pop)
+#else
+#pragma pack()
+#endif /* C99 */
 
 /* Transmit Descriptor - Legacy */
 struct ixgbe_legacy_tx_desc {
@@ -3562,7 +3615,6 @@ enum ixgbe_media_type {
        ixgbe_media_type_fiber_lco,
        ixgbe_media_type_copper,
        ixgbe_media_type_backplane,
-       ixgbe_media_type_sgmii,
        ixgbe_media_type_cx4,
        ixgbe_media_type_virtual
 };
@@ -3643,7 +3695,7 @@ struct ixgbe_bus_info {
        enum ixgbe_bus_type type;
 
        u16 func;
-       u16 lan_id;
+       u8 lan_id;
        u16 instance_id;
 };
 
@@ -3784,6 +3836,7 @@ struct ixgbe_mac_operations {
        s32 (*enable_sec_rx_path)(struct ixgbe_hw *);
        s32 (*acquire_swfw_sync)(struct ixgbe_hw *, u32);
        void (*release_swfw_sync)(struct ixgbe_hw *, u32);
+       void (*init_swfw_sync)(struct ixgbe_hw *);
        s32 (*prot_autoc_read)(struct ixgbe_hw *, bool *, u32 *);
        s32 (*prot_autoc_write)(struct ixgbe_hw *, u32, bool);
 
@@ -3823,8 +3876,9 @@ struct ixgbe_mac_operations {
        s32 (*enable_mc)(struct ixgbe_hw *);
        s32 (*disable_mc)(struct ixgbe_hw *);
        s32 (*clear_vfta)(struct ixgbe_hw *);
-       s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool);
-       s32 (*set_vlvf)(struct ixgbe_hw *, u32, u32, bool, bool *);
+       s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool, bool);
+       s32 (*set_vlvf)(struct ixgbe_hw *, u32, u32, bool, u32 *, u32,
+                       bool);
        s32 (*init_uta_tables)(struct ixgbe_hw *);
        void (*set_mac_anti_spoofing)(struct ixgbe_hw *, bool, int);
        void (*set_vlan_anti_spoofing)(struct ixgbe_hw *, bool, int);
@@ -3832,6 +3886,7 @@ struct ixgbe_mac_operations {
        /* Flow Control */
        s32 (*fc_enable)(struct ixgbe_hw *);
        s32 (*setup_fc)(struct ixgbe_hw *);
+       void (*fc_autoneg)(struct ixgbe_hw *);
 
        /* Manageability interface */
        s32 (*set_fw_drv_ver)(struct ixgbe_hw *, u8, u8, u8, u8);
@@ -4077,10 +4132,12 @@ struct ixgbe_hw {
 #define IXGBE_FUSES0_REV_MASK          (3 << 6)
 
 #define IXGBE_KRM_PORT_CAR_GEN_CTRL(P) ((P) ? 0x8010 : 0x4010)
+#define IXGBE_KRM_LINK_S1(P)           ((P) ? 0x8200 : 0x4200)
 #define IXGBE_KRM_LINK_CTRL_1(P)       ((P) ? 0x820C : 0x420C)
 #define IXGBE_KRM_AN_CNTL_1(P)         ((P) ? 0x822C : 0x422C)
 #define IXGBE_KRM_AN_CNTL_8(P)         ((P) ? 0x8248 : 0x4248)
 #define IXGBE_KRM_SGMII_CTRL(P)                ((P) ? 0x82A0 : 0x42A0)
+#define IXGBE_KRM_LP_BASE_PAGE_HIGH(P) ((P) ? 0x836C : 0x436C)
 #define IXGBE_KRM_DSP_TXFFE_STATE_4(P) ((P) ? 0x8634 : 0x4634)
 #define IXGBE_KRM_DSP_TXFFE_STATE_5(P) ((P) ? 0x8638 : 0x4638)
 #define IXGBE_KRM_RX_TRN_LINKUP_CTRL(P)        ((P) ? 0x8B00 : 0x4B00)
@@ -4102,6 +4159,7 @@ struct ixgbe_hw {
 #define IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR           (1 << 18)
 #define IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KX          (1 << 24)
 #define IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KR          (1 << 26)
+#define IXGBE_KRM_LINK_S1_MAC_AN_COMPLETE              (1 << 28)
 #define IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE           (1 << 29)
 #define IXGBE_KRM_LINK_CTRL_1_TETH_AN_RESTART          (1 << 31)
 
@@ -4110,6 +4168,8 @@ struct ixgbe_hw {
 
 #define IXGBE_KRM_AN_CNTL_8_LINEAR                     (1 << 0)
 #define IXGBE_KRM_AN_CNTL_8_LIMITING                   (1 << 1)
+#define IXGBE_KRM_LP_BASE_PAGE_HIGH_SYM_PAUSE          (1 << 10)
+#define IXGBE_KRM_LP_BASE_PAGE_HIGH_ASM_PAUSE          (1 << 11)
 
 #define IXGBE_KRM_SGMII_CTRL_MAC_TAR_FORCE_100_D       (1 << 12)
 #define IXGBE_KRM_SGMII_CTRL_MAC_TAR_FORCE_10_D                (1 << 19)