net/ixgbe/base: use clause 22 MDIO functions for Marvell PHYs
[dpdk.git] / drivers / net / ixgbe / base / ixgbe_x550.c
index b23d479..e15054b 100644 (file)
@@ -1975,6 +1975,7 @@ s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,
                        *speed = IXGBE_LINK_SPEED_10GB_FULL;
        } else {
                switch (hw->phy.type) {
+               case ixgbe_phy_ext_1g_t:
                case ixgbe_phy_sgmii:
                        *speed = IXGBE_LINK_SPEED_1GB_FULL;
                        break;
@@ -2372,6 +2373,10 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
                /* set up for CS4227 usage */
                hw->phy.phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM;
                break;
+       case IXGBE_DEV_ID_X550EM_X_1G_T:
+               phy->ops.read_reg_mdi = ixgbe_read_phy_reg_mdi_22;
+               phy->ops.write_reg_mdi = ixgbe_write_phy_reg_mdi_22;
+               break;
        default:
                break;
        }
@@ -2399,6 +2404,10 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
                phy->ops.read_reg = ixgbe_read_phy_reg_x550em;
                phy->ops.write_reg = ixgbe_write_phy_reg_x550em;
                break;
+       case ixgbe_phy_ext_1g_t:
+               /* link is managed by FW */
+               phy->ops.setup_link = NULL;
+               break;
        case ixgbe_phy_x550em_xfi:
                /* link is managed by HW */
                phy->ops.setup_link = NULL;
@@ -3706,6 +3715,9 @@ u32 ixgbe_get_supported_physical_layer_X550em(struct ixgbe_hw *hw)
        case ixgbe_phy_sgmii:
                physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_KX;
                break;
+       case ixgbe_phy_ext_1g_t:
+               physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T;
+               break;
        default:
                break;
        }