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mk: add sensible default target with defconfig
[dpdk.git] / drivers / net / ixgbe / ixgbe_ethdev.c
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index dbcb20e..22171d8 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -57,7 +57,6 @@
 #include <rte_ether.h>
 #include <rte_ethdev.h>
 #include <rte_ethdev_pci.h>
-#include <rte_atomic.h>
 #include <rte_malloc.h>
 #include <rte_random.h>
 #include <rte_dev.h>
@@ -240,7 +239,7 @@ static int ixgbe_dev_rss_reta_query(struct rte_eth_dev *dev,
                        struct rte_eth_rss_reta_entry64 *reta_conf,
                        uint16_t reta_size);
 static void ixgbe_dev_link_status_print(struct rte_eth_dev *dev);
-static int ixgbe_dev_lsc_interrupt_setup(struct rte_eth_dev *dev);
+static int ixgbe_dev_lsc_interrupt_setup(struct rte_eth_dev *dev, uint8_t on);
 static int ixgbe_dev_macsec_interrupt_setup(struct rte_eth_dev *dev);
 static int ixgbe_dev_rxq_interrupt_setup(struct rte_eth_dev *dev);
 static int ixgbe_dev_interrupt_get_status(struct rte_eth_dev *dev);
@@ -304,9 +303,6 @@ static void ixgbe_set_ivar_map(struct ixgbe_hw *hw, int8_t direction,
                               uint8_t queue, uint8_t msix_vector);
 static void ixgbe_configure_msix(struct rte_eth_dev *dev);
 
-static int ixgbe_set_queue_rate_limit(struct rte_eth_dev *dev,
-               uint16_t queue_idx, uint16_t tx_rate);
-
 static int ixgbevf_add_mac_addr(struct rte_eth_dev *dev,
                                struct ether_addr *mac_addr,
                                uint32_t index, uint32_t pool);
@@ -446,13 +442,8 @@ static const struct rte_pci_id pci_id_ixgbe_map[] = {
        { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ) },
        { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KR) },
        { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE) },
-       { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) },
        { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4) },
        { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP) },
-       { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_SFP) },
-       { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_RNDC) },
-       { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_560FLR) },
-       { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_ECNA_DP) },
        { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE) },
        { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE) },
        { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_EM) },
@@ -1351,6 +1342,9 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev)
        /* initialize bandwidth configuration info */
        memset(bw_conf, 0, sizeof(struct ixgbe_bw_conf));
 
+       /* initialize Traffic Manager configuration */
+       ixgbe_tm_conf_init(eth_dev);
+
        return 0;
 }
 
@@ -1404,6 +1398,9 @@ eth_ixgbe_dev_uninit(struct rte_eth_dev *eth_dev)
        /* clear all the filters list */
        ixgbe_filterlist_flush();
 
+       /* Remove all Traffic Manager configuration */
+       ixgbe_tm_conf_uninit(eth_dev);
+
        return 0;
 }
 
@@ -2497,6 +2494,8 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
        int status;
        uint16_t vf, idx;
        uint32_t *link_speeds;
+       struct ixgbe_tm_conf *tm_conf =
+               IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
 
        PMD_INIT_FUNC_TRACE();
 
@@ -2643,9 +2642,22 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
 
        speed = 0x0;
        if (*link_speeds == ETH_LINK_SPEED_AUTONEG) {
-               speed = (hw->mac.type != ixgbe_mac_82598EB) ?
-                               IXGBE_LINK_SPEED_82599_AUTONEG :
-                               IXGBE_LINK_SPEED_82598_AUTONEG;
+               switch (hw->mac.type) {
+               case ixgbe_mac_82598EB:
+                       speed = IXGBE_LINK_SPEED_82598_AUTONEG;
+                       break;
+               case ixgbe_mac_82599EB:
+               case ixgbe_mac_X540:
+                       speed = IXGBE_LINK_SPEED_82599_AUTONEG;
+                       break;
+               case ixgbe_mac_X550:
+               case ixgbe_mac_X550EM_x:
+               case ixgbe_mac_X550EM_a:
+                       speed = IXGBE_LINK_SPEED_X550_AUTONEG;
+                       break;
+               default:
+                       speed = IXGBE_LINK_SPEED_82599_AUTONEG;
+               }
        } else {
                if (*link_speeds & ETH_LINK_SPEED_10G)
                        speed |= IXGBE_LINK_SPEED_10GB_FULL;
@@ -2664,7 +2676,9 @@ skip_link_setup:
        if (rte_intr_allow_others(intr_handle)) {
                /* check if lsc interrupt is enabled */
                if (dev->data->dev_conf.intr_conf.lsc != 0)
-                       ixgbe_dev_lsc_interrupt_setup(dev);
+                       ixgbe_dev_lsc_interrupt_setup(dev, TRUE);
+               else
+                       ixgbe_dev_lsc_interrupt_setup(dev, FALSE);
                ixgbe_dev_macsec_interrupt_setup(dev);
        } else {
                rte_intr_callback_unregister(intr_handle,
@@ -2687,6 +2701,11 @@ skip_link_setup:
        ixgbe_l2_tunnel_conf(dev);
        ixgbe_filter_restore(dev);
 
+       if (tm_conf->root && !tm_conf->committed)
+               PMD_DRV_LOG(WARNING,
+                           "please call hierarchy_commit() "
+                           "before starting the port");
+
        return 0;
 
 error:
@@ -2709,6 +2728,8 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)
        struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
        struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
        int vf;
+       struct ixgbe_tm_conf *tm_conf =
+               IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
 
        PMD_INIT_FUNC_TRACE();
 
@@ -2755,6 +2776,9 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)
                rte_free(intr_handle->intr_vec);
                intr_handle->intr_vec = NULL;
        }
+
+       /* reset hierarchy commit */
+       tm_conf->committed = false;
 }
 
 /*
@@ -3677,6 +3701,10 @@ ixgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
            hw->mac.type == ixgbe_mac_X550_vf) {
                dev_info->speed_capa |= ETH_LINK_SPEED_100M;
        }
+       if (hw->mac.type == ixgbe_mac_X550) {
+               dev_info->speed_capa |= ETH_LINK_SPEED_2_5G;
+               dev_info->speed_capa |= ETH_LINK_SPEED_5G;
+       }
 }
 
 static const uint32_t *
@@ -3956,6 +3984,14 @@ ixgbe_dev_link_update_share(struct rte_eth_dev *dev,
                link.link_speed = ETH_SPEED_NUM_1G;
                break;
 
+       case IXGBE_LINK_SPEED_2_5GB_FULL:
+               link.link_speed = ETH_SPEED_NUM_2_5G;
+               break;
+
+       case IXGBE_LINK_SPEED_5GB_FULL:
+               link.link_speed = ETH_SPEED_NUM_5G;
+               break;
+
        case IXGBE_LINK_SPEED_10GB_FULL:
                link.link_speed = ETH_SPEED_NUM_10G;
                break;
@@ -4037,19 +4073,24 @@ ixgbe_dev_allmulticast_disable(struct rte_eth_dev *dev)
  *
  * @param dev
  *  Pointer to struct rte_eth_dev.
+ * @param on
+ *  Enable or Disable.
  *
  * @return
  *  - On success, zero.
  *  - On failure, a negative value.
  */
 static int
-ixgbe_dev_lsc_interrupt_setup(struct rte_eth_dev *dev)
+ixgbe_dev_lsc_interrupt_setup(struct rte_eth_dev *dev, uint8_t on)
 {
        struct ixgbe_interrupt *intr =
                IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private);
 
        ixgbe_dev_link_status_print(dev);
-       intr->mask |= IXGBE_EICR_LSC;
+       if (on)
+               intr->mask |= IXGBE_EICR_LSC;
+       else
+               intr->mask &= ~IXGBE_EICR_LSC;
 
        return 0;
 }
@@ -5440,6 +5481,9 @@ ixgbe_mirror_rule_reset(struct rte_eth_dev *dev, uint8_t rule_id)
        if (ixgbe_vt_check(hw) < 0)
                return -ENOTSUP;
 
+       if (rule_id >= IXGBE_MAX_MIRROR_RULES)
+               return -EINVAL;
+
        memset(&mr_info->mr_conf[rule_id], 0,
               sizeof(struct rte_eth_mirror_conf));
 
@@ -5597,7 +5641,8 @@ ixgbe_set_ivar_map(struct ixgbe_hw *hw, int8_t direction,
                tmp |= (msix_vector << (8 * (queue & 0x3)));
                IXGBE_WRITE_REG(hw, IXGBE_IVAR(idx), tmp);
        } else if ((hw->mac.type == ixgbe_mac_82599EB) ||
-                       (hw->mac.type == ixgbe_mac_X540)) {
+                       (hw->mac.type == ixgbe_mac_X540) ||
+                       (hw->mac.type == ixgbe_mac_X550)) {
                if (direction == -1) {
                        /* other causes */
                        idx = ((queue & 1) * 8);
@@ -5705,6 +5750,7 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
                break;
        case ixgbe_mac_82599EB:
        case ixgbe_mac_X540:
+       case ixgbe_mac_X550:
                ixgbe_set_ivar_map(hw, -1, 1, IXGBE_MISC_VEC_ID);
                break;
        default:
@@ -5722,8 +5768,9 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
        IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask);
 }
 
-static int ixgbe_set_queue_rate_limit(struct rte_eth_dev *dev,
-       uint16_t queue_idx, uint16_t tx_rate)
+int
+ixgbe_set_queue_rate_limit(struct rte_eth_dev *dev,
+                          uint16_t queue_idx, uint16_t tx_rate)
 {
        struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
        uint32_t rf_dec, rf_int;
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