#include <unistd.h>
#include <stdarg.h>
#include <inttypes.h>
-#include <netinet/in.h>
#include <rte_string_fns.h>
#include <rte_byteorder.h>
#include <rte_common.h>
#include "ixgbe_rxtx.h"
#include "base/ixgbe_type.h"
#include "base/ixgbe_phy.h"
+#include "base/ixgbe_osdep.h"
#include "ixgbe_regs.h"
/*
struct rte_eth_xstat_name *xstats_names, unsigned limit);
static int ixgbe_dev_xstats_get_names_by_id(
struct rte_eth_dev *dev,
- struct rte_eth_xstat_name *xstats_names,
const uint64_t *ids,
+ struct rte_eth_xstat_name *xstats_names,
unsigned int limit);
static int ixgbe_dev_queue_stats_mapping_set(struct rte_eth_dev *eth_dev,
uint16_t queue_id,
static int ixgbe_uc_hash_table_set(struct rte_eth_dev *dev, struct
rte_ether_addr * mac_addr, uint8_t on);
static int ixgbe_uc_all_hash_table_set(struct rte_eth_dev *dev, uint8_t on);
-static int ixgbe_mirror_rule_set(struct rte_eth_dev *dev,
- struct rte_eth_mirror_conf *mirror_conf,
- uint8_t rule_id, uint8_t on);
-static int ixgbe_mirror_rule_reset(struct rte_eth_dev *dev,
- uint8_t rule_id);
static int ixgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev,
uint16_t queue_id);
static int ixgbe_dev_rx_queue_intr_disable(struct rte_eth_dev *dev,
.mac_addr_set = ixgbe_set_default_mac_addr,
.uc_hash_table_set = ixgbe_uc_hash_table_set,
.uc_all_hash_table_set = ixgbe_uc_all_hash_table_set,
- .mirror_rule_set = ixgbe_mirror_rule_set,
- .mirror_rule_reset = ixgbe_mirror_rule_reset,
.set_queue_rate_limit = ixgbe_set_queue_rate_limit,
.reta_update = ixgbe_dev_rss_reta_update,
.reta_query = ixgbe_dev_rss_reta_query,
eth_dev->dev_ops = &ixgbe_eth_dev_ops;
eth_dev->rx_queue_count = ixgbe_dev_rx_queue_count;
- eth_dev->rx_descriptor_done = ixgbe_dev_rx_descriptor_done;
eth_dev->rx_descriptor_status = ixgbe_dev_rx_descriptor_status;
eth_dev->tx_descriptor_status = ixgbe_dev_tx_descriptor_status;
eth_dev->rx_pkt_burst = &ixgbe_recv_pkts;
PMD_INIT_LOG(ERR,
"Failed to allocate %d bytes needed to store MAC addresses",
RTE_ETHER_ADDR_LEN * IXGBE_VMDQ_NUM_UC_MAC);
+ rte_free(eth_dev->data->mac_addrs);
+ eth_dev->data->mac_addrs = NULL;
return -ENOMEM;
}
if (!fdir_info->hash_map) {
PMD_INIT_LOG(ERR,
"Failed to allocate memory for fdir hash map!");
+ rte_hash_free(fdir_info->hash_handle);
return -ENOMEM;
}
fdir_info->mask_added = FALSE;
if (!l2_tn_info->hash_map) {
PMD_INIT_LOG(ERR,
"Failed to allocate memory for L2 TN hash map!");
+ rte_hash_free(l2_tn_info->hash_handle);
return -ENOMEM;
}
l2_tn_info->e_tag_en = FALSE;
PMD_INIT_FUNC_TRACE();
eth_dev->dev_ops = &ixgbevf_eth_dev_ops;
- eth_dev->rx_descriptor_done = ixgbe_dev_rx_descriptor_done;
eth_dev->rx_descriptor_status = ixgbe_dev_rx_descriptor_status;
eth_dev->tx_descriptor_status = ixgbe_dev_tx_descriptor_status;
eth_dev->rx_pkt_burst = &ixgbe_recv_pkts;
default:
PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", diag);
+ rte_free(eth_dev->data->mac_addrs);
+ eth_dev->data->mac_addrs = NULL;
return -EIO;
}
static int ixgbe_dev_xstats_get_names_by_id(
struct rte_eth_dev *dev,
- struct rte_eth_xstat_name *xstats_names,
const uint64_t *ids,
+ struct rte_eth_xstat_name *xstats_names,
unsigned int limit)
{
if (!ids) {
uint16_t size = ixgbe_xstats_calc_num();
struct rte_eth_xstat_name xstats_names_copy[size];
- ixgbe_dev_xstats_get_names_by_id(dev, xstats_names_copy, NULL,
+ ixgbe_dev_xstats_get_names_by_id(dev, NULL, xstats_names_copy,
size);
for (i = 0; i < limit; i++) {
* now only one vector is used for Rx queue
*/
intr_vector = 1;
- if (rte_intr_efd_enable(intr_handle, intr_vector))
+ if (rte_intr_efd_enable(intr_handle, intr_vector)) {
+ ixgbe_dev_clear_queues(dev);
return -1;
+ }
}
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
if (intr_handle->intr_vec == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec", dev->data->nb_rx_queues);
+ ixgbe_dev_clear_queues(dev);
return -ENOMEM;
}
}
return new_val;
}
-#define IXGBE_MRCTL_VPME 0x01 /* Virtual Pool Mirroring. */
-#define IXGBE_MRCTL_UPME 0x02 /* Uplink Port Mirroring. */
-#define IXGBE_MRCTL_DPME 0x04 /* Downlink Port Mirroring. */
-#define IXGBE_MRCTL_VLME 0x08 /* VLAN Mirroring. */
-#define IXGBE_INVALID_MIRROR_TYPE(mirror_type) \
- ((mirror_type) & ~(uint8_t)(ETH_MIRROR_VIRTUAL_POOL_UP | \
- ETH_MIRROR_UPLINK_PORT | ETH_MIRROR_DOWNLINK_PORT | ETH_MIRROR_VLAN))
-
-static int
-ixgbe_mirror_rule_set(struct rte_eth_dev *dev,
- struct rte_eth_mirror_conf *mirror_conf,
- uint8_t rule_id, uint8_t on)
-{
- uint32_t mr_ctl, vlvf;
- uint32_t mp_lsb = 0;
- uint32_t mv_msb = 0;
- uint32_t mv_lsb = 0;
- uint32_t mp_msb = 0;
- uint8_t i = 0;
- int reg_index = 0;
- uint64_t vlan_mask = 0;
-
- const uint8_t pool_mask_offset = 32;
- const uint8_t vlan_mask_offset = 32;
- const uint8_t dst_pool_offset = 8;
- const uint8_t rule_mr_offset = 4;
- const uint8_t mirror_rule_mask = 0x0F;
-
- struct ixgbe_mirror_info *mr_info =
- (IXGBE_DEV_PRIVATE_TO_PFDATA(dev->data->dev_private));
- struct ixgbe_hw *hw =
- IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- uint8_t mirror_type = 0;
-
- if (ixgbe_vt_check(hw) < 0)
- return -ENOTSUP;
-
- if (rule_id >= IXGBE_MAX_MIRROR_RULES)
- return -EINVAL;
-
- if (IXGBE_INVALID_MIRROR_TYPE(mirror_conf->rule_type)) {
- PMD_DRV_LOG(ERR, "unsupported mirror type 0x%x.",
- mirror_conf->rule_type);
- return -EINVAL;
- }
-
- if (mirror_conf->rule_type & ETH_MIRROR_VLAN) {
- mirror_type |= IXGBE_MRCTL_VLME;
- /* Check if vlan id is valid and find conresponding VLAN ID
- * index in VLVF
- */
- for (i = 0; i < IXGBE_VLVF_ENTRIES; i++) {
- if (mirror_conf->vlan.vlan_mask & (1ULL << i)) {
- /* search vlan id related pool vlan filter
- * index
- */
- reg_index = ixgbe_find_vlvf_slot(
- hw,
- mirror_conf->vlan.vlan_id[i],
- false);
- if (reg_index < 0)
- return -EINVAL;
- vlvf = IXGBE_READ_REG(hw,
- IXGBE_VLVF(reg_index));
- if ((vlvf & IXGBE_VLVF_VIEN) &&
- ((vlvf & IXGBE_VLVF_VLANID_MASK) ==
- mirror_conf->vlan.vlan_id[i]))
- vlan_mask |= (1ULL << reg_index);
- else
- return -EINVAL;
- }
- }
-
- if (on) {
- mv_lsb = vlan_mask & 0xFFFFFFFF;
- mv_msb = vlan_mask >> vlan_mask_offset;
-
- mr_info->mr_conf[rule_id].vlan.vlan_mask =
- mirror_conf->vlan.vlan_mask;
- for (i = 0; i < ETH_VMDQ_MAX_VLAN_FILTERS; i++) {
- if (mirror_conf->vlan.vlan_mask & (1ULL << i))
- mr_info->mr_conf[rule_id].vlan.vlan_id[i] =
- mirror_conf->vlan.vlan_id[i];
- }
- } else {
- mv_lsb = 0;
- mv_msb = 0;
- mr_info->mr_conf[rule_id].vlan.vlan_mask = 0;
- for (i = 0; i < ETH_VMDQ_MAX_VLAN_FILTERS; i++)
- mr_info->mr_conf[rule_id].vlan.vlan_id[i] = 0;
- }
- }
-
- /**
- * if enable pool mirror, write related pool mask register,if disable
- * pool mirror, clear PFMRVM register
- */
- if (mirror_conf->rule_type & ETH_MIRROR_VIRTUAL_POOL_UP) {
- mirror_type |= IXGBE_MRCTL_VPME;
- if (on) {
- mp_lsb = mirror_conf->pool_mask & 0xFFFFFFFF;
- mp_msb = mirror_conf->pool_mask >> pool_mask_offset;
- mr_info->mr_conf[rule_id].pool_mask =
- mirror_conf->pool_mask;
-
- } else {
- mp_lsb = 0;
- mp_msb = 0;
- mr_info->mr_conf[rule_id].pool_mask = 0;
- }
- }
- if (mirror_conf->rule_type & ETH_MIRROR_UPLINK_PORT)
- mirror_type |= IXGBE_MRCTL_UPME;
- if (mirror_conf->rule_type & ETH_MIRROR_DOWNLINK_PORT)
- mirror_type |= IXGBE_MRCTL_DPME;
-
- /* read mirror control register and recalculate it */
- mr_ctl = IXGBE_READ_REG(hw, IXGBE_MRCTL(rule_id));
-
- if (on) {
- mr_ctl |= mirror_type;
- mr_ctl &= mirror_rule_mask;
- mr_ctl |= mirror_conf->dst_pool << dst_pool_offset;
- } else {
- mr_ctl &= ~(mirror_conf->rule_type & mirror_rule_mask);
- }
-
- mr_info->mr_conf[rule_id].rule_type = mirror_conf->rule_type;
- mr_info->mr_conf[rule_id].dst_pool = mirror_conf->dst_pool;
-
- /* write mirrror control register */
- IXGBE_WRITE_REG(hw, IXGBE_MRCTL(rule_id), mr_ctl);
-
- /* write pool mirrror control register */
- if (mirror_conf->rule_type & ETH_MIRROR_VIRTUAL_POOL_UP) {
- IXGBE_WRITE_REG(hw, IXGBE_VMRVM(rule_id), mp_lsb);
- IXGBE_WRITE_REG(hw, IXGBE_VMRVM(rule_id + rule_mr_offset),
- mp_msb);
- }
- /* write VLAN mirrror control register */
- if (mirror_conf->rule_type & ETH_MIRROR_VLAN) {
- IXGBE_WRITE_REG(hw, IXGBE_VMRVLAN(rule_id), mv_lsb);
- IXGBE_WRITE_REG(hw, IXGBE_VMRVLAN(rule_id + rule_mr_offset),
- mv_msb);
- }
-
- return 0;
-}
-
-static int
-ixgbe_mirror_rule_reset(struct rte_eth_dev *dev, uint8_t rule_id)
-{
- int mr_ctl = 0;
- uint32_t lsb_val = 0;
- uint32_t msb_val = 0;
- const uint8_t rule_mr_offset = 4;
-
- struct ixgbe_hw *hw =
- IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- struct ixgbe_mirror_info *mr_info =
- (IXGBE_DEV_PRIVATE_TO_PFDATA(dev->data->dev_private));
-
- if (ixgbe_vt_check(hw) < 0)
- return -ENOTSUP;
-
- if (rule_id >= IXGBE_MAX_MIRROR_RULES)
- return -EINVAL;
-
- memset(&mr_info->mr_conf[rule_id], 0,
- sizeof(struct rte_eth_mirror_conf));
-
- /* clear PFVMCTL register */
- IXGBE_WRITE_REG(hw, IXGBE_MRCTL(rule_id), mr_ctl);
-
- /* clear pool mask register */
- IXGBE_WRITE_REG(hw, IXGBE_VMRVM(rule_id), lsb_val);
- IXGBE_WRITE_REG(hw, IXGBE_VMRVM(rule_id + rule_mr_offset), msb_val);
-
- /* clear vlan mask register */
- IXGBE_WRITE_REG(hw, IXGBE_VMRVLAN(rule_id), lsb_val);
- IXGBE_WRITE_REG(hw, IXGBE_VMRVLAN(rule_id + rule_mr_offset), msb_val);
-
- return 0;
-}
-
static int
ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
{