net/mlx5: fix UAR allocation diagnostics messages

[dpdk.git] / drivers / net / ixgbe / ixgbe_ethdev.c

diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index c49ae56..761a0f2 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -27,8 +27,8 @@
 #include <rte_eal.h>
 #include <rte_alarm.h>
 #include <rte_ether.h>
-#include <rte_ethdev_driver.h>
-#include <rte_ethdev_pci.h>
+#include <ethdev_driver.h>
+#include <ethdev_pci.h>
 #include <rte_malloc.h>
 #include <rte_random.h>
 #include <rte_dev.h>
@@ -560,6 +560,7 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops = {
        .udp_tunnel_port_del  = ixgbe_dev_udp_tunnel_port_del,
        .tm_ops_get           = ixgbe_tm_ops_get,
        .tx_done_cleanup      = ixgbe_dev_tx_done_cleanup,
+       .get_monitor_addr     = ixgbe_get_monitor_addr,
 };
 
 /*
@@ -5173,7 +5174,7 @@ ixgbe_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
        hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 
        /* switch to jumbo mode if needed */
-       if (frame_size > RTE_ETHER_MAX_LEN) {
+       if (frame_size > IXGBE_ETH_MAX_LEN) {
                dev->data->dev_conf.rxmode.offloads |=
                        DEV_RX_OFFLOAD_JUMBO_FRAME;
                hlreg0 |= IXGBE_HLREG0_JUMBOEN;
@@ -6555,7 +6556,8 @@ ixgbevf_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
         * prior to 3.11.33 which contains the following change:
         * "ixgbe: Enable jumbo frames support w/ SR-IOV"
         */
-       ixgbevf_rlpml_set_vf(hw, max_frame);
+       if (ixgbevf_rlpml_set_vf(hw, max_frame))
+               return -EINVAL;
 
        /* update max frame size */
        dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame;
@@ -7557,7 +7559,7 @@ ixgbe_e_tag_enable(struct ixgbe_hw *hw)
 
 static int
 ixgbe_e_tag_filter_del(struct rte_eth_dev *dev,
-                      struct rte_eth_l2_tunnel_conf *l2_tunnel)
+                      struct ixgbe_l2_tunnel_conf *l2_tunnel)
 {
        int ret = 0;
        struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
@@ -7593,7 +7595,7 @@ ixgbe_e_tag_filter_del(struct rte_eth_dev *dev,
 
 static int
 ixgbe_e_tag_filter_add(struct rte_eth_dev *dev,
-                      struct rte_eth_l2_tunnel_conf *l2_tunnel)
+                      struct ixgbe_l2_tunnel_conf *l2_tunnel)
 {
        int ret = 0;
        struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
@@ -7697,7 +7699,7 @@ ixgbe_remove_l2_tn_filter(struct ixgbe_l2_tn_info *l2_tn_info,
 /* Add l2 tunnel filter */
 int
 ixgbe_dev_l2_tunnel_filter_add(struct rte_eth_dev *dev,
-                              struct rte_eth_l2_tunnel_conf *l2_tunnel,
+                              struct ixgbe_l2_tunnel_conf *l2_tunnel,
                               bool restore)
 {
        int ret;
@@ -7754,7 +7756,7 @@ ixgbe_dev_l2_tunnel_filter_add(struct rte_eth_dev *dev,
 /* Delete l2 tunnel filter */
 int
 ixgbe_dev_l2_tunnel_filter_del(struct rte_eth_dev *dev,
-                              struct rte_eth_l2_tunnel_conf *l2_tunnel)
+                              struct ixgbe_l2_tunnel_conf *l2_tunnel)
 {
        int ret;
        struct ixgbe_l2_tn_info *l2_tn_info =
@@ -8176,7 +8178,7 @@ ixgbe_l2_tn_filter_restore(struct rte_eth_dev *dev)
        struct ixgbe_l2_tn_info *l2_tn_info =
                IXGBE_DEV_PRIVATE_TO_L2_TN_INFO(dev->data->dev_private);
        struct ixgbe_l2_tn_filter *node;
-       struct rte_eth_l2_tunnel_conf l2_tn_conf;
+       struct ixgbe_l2_tunnel_conf l2_tn_conf;
 
        TAILQ_FOREACH(node, &l2_tn_info->l2_tn_list, entries) {
                l2_tn_conf.l2_tunnel_type = node->key.l2_tn_type;
@@ -8283,7 +8285,7 @@ ixgbe_clear_all_l2_tn_filter(struct rte_eth_dev *dev)
        struct ixgbe_l2_tn_info *l2_tn_info =
                IXGBE_DEV_PRIVATE_TO_L2_TN_INFO(dev->data->dev_private);
        struct ixgbe_l2_tn_filter *l2_tn_filter;
-       struct rte_eth_l2_tunnel_conf l2_tn_conf;
+       struct ixgbe_l2_tunnel_conf l2_tn_conf;
        int ret = 0;
 
        while ((l2_tn_filter = TAILQ_FIRST(&l2_tn_info->l2_tn_list))) {