ixgbevf: cleanup unnecessary interrupt handler
[dpdk.git] / drivers / net / ixgbe / ixgbe_ethdev.c
index 25966ef..c0dbf79 100644 (file)
@@ -208,8 +208,6 @@ static void ixgbe_dcb_init(struct ixgbe_hw *hw,struct ixgbe_dcb_config *dcb_conf
 /* For Virtual Function support */
 static int eth_ixgbevf_dev_init(struct rte_eth_dev *eth_dev);
 static int eth_ixgbevf_dev_uninit(struct rte_eth_dev *eth_dev);
-static int ixgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev);
-static int ixgbevf_dev_interrupt_action(struct rte_eth_dev *dev);
 static int  ixgbevf_dev_configure(struct rte_eth_dev *dev);
 static int  ixgbevf_dev_start(struct rte_eth_dev *dev);
 static void ixgbevf_dev_stop(struct rte_eth_dev *dev);
@@ -225,8 +223,6 @@ static void ixgbevf_vlan_strip_queue_set(struct rte_eth_dev *dev,
                uint16_t queue, int on);
 static void ixgbevf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on);
-static void ixgbevf_dev_interrupt_handler(struct rte_intr_handle *handle,
-                                         void *param);
 static int ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev,
                                            uint16_t queue_id);
 static int ixgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev,
@@ -1126,6 +1122,13 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev)
                        eth_dev->data->port_id, pci_dev->id.vendor_id,
                        pci_dev->id.device_id);
 
+       rte_intr_callback_register(&pci_dev->intr_handle,
+                                  ixgbe_dev_interrupt_handler,
+                                  (void *)eth_dev);
+
+       /* enable uio/vfio intr/eventfd mapping */
+       rte_intr_enable(&pci_dev->intr_handle);
+
        /* enable support intr */
        ixgbe_enable_intr(eth_dev);
 
@@ -1975,17 +1978,18 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
        ixgbe_pf_host_configure(dev);
 
        /* check and configure queue intr-vector mapping */
-       if (dev->data->dev_conf.intr_conf.rxq != 0)
+       if ((rte_intr_cap_multiple(intr_handle) ||
+            !RTE_ETH_DEV_SRIOV(dev).active) &&
+           dev->data->dev_conf.intr_conf.rxq != 0) {
                intr_vector = dev->data->nb_rx_queues;
-
-       if (rte_intr_efd_enable(intr_handle, intr_vector))
-               return -1;
+               if (rte_intr_efd_enable(intr_handle, intr_vector))
+                       return -1;
+       }
 
        if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
                intr_handle->intr_vec =
                        rte_zmalloc("intr_vec",
-                                   dev->data->nb_rx_queues * sizeof(int),
-                                   0);
+                                   dev->data->nb_rx_queues * sizeof(int), 0);
                if (intr_handle->intr_vec == NULL) {
                        PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
                                     " intr_vec\n", dev->data->nb_rx_queues);
@@ -2072,20 +2076,22 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
 
 skip_link_setup:
 
-       /* check if lsc interrupt is enabled */
-       if (dev->data->dev_conf.intr_conf.lsc != 0) {
-               if (rte_intr_allow_others(intr_handle)) {
-                       rte_intr_callback_register(intr_handle,
-                                                  ixgbe_dev_interrupt_handler,
-                                                  (void *)dev);
+       if (rte_intr_allow_others(intr_handle)) {
+               /* check if lsc interrupt is enabled */
+               if (dev->data->dev_conf.intr_conf.lsc != 0)
                        ixgbe_dev_lsc_interrupt_setup(dev);
-               } else
+       } else {
+               rte_intr_callback_unregister(intr_handle,
+                                            ixgbe_dev_interrupt_handler,
+                                            (void *)dev);
+               if (dev->data->dev_conf.intr_conf.lsc != 0)
                        PMD_INIT_LOG(INFO, "lsc won't enable because of"
                                     " no intr multiplex\n");
        }
 
        /* check if rxq interrupt is enabled */
-       if (dev->data->dev_conf.intr_conf.rxq != 0)
+       if (dev->data->dev_conf.intr_conf.rxq != 0 &&
+           rte_intr_dp_is_en(intr_handle))
                ixgbe_dev_rxq_interrupt_setup(dev);
 
        /* enable uio/vfio intr/eventfd mapping */
@@ -2197,6 +2203,12 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)
        memset(filter_info->fivetuple_mask, 0,
                sizeof(uint32_t) * IXGBE_5TUPLE_ARRAY_SIZE);
 
+       if (!rte_intr_allow_others(intr_handle))
+               /* resume to the default handler */
+               rte_intr_callback_register(intr_handle,
+                                          ixgbe_dev_interrupt_handler,
+                                          (void *)dev);
+
        /* Clean datapath event and queue/vec mapping */
        rte_intr_efd_disable(intr_handle);
        if (intr_handle->intr_vec != NULL) {
@@ -3051,30 +3063,6 @@ ixgbe_dev_interrupt_get_status(struct rte_eth_dev *dev)
        return 0;
 }
 
-static int
-ixgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev)
-{
-       uint32_t eicr;
-       struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-       struct ixgbe_interrupt *intr =
-               IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private);
-
-       /* clear all cause mask */
-       ixgbevf_intr_disable(hw);
-
-       /* read-on-clear nic registers here */
-       eicr = IXGBE_READ_REG(hw, IXGBE_VTEICR);
-       PMD_DRV_LOG(INFO, "eicr %x", eicr);
-
-       intr->flags = 0;
-
-       /* set flag for async link update */
-       if (eicr & IXGBE_EICR_LSC)
-               intr->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
-
-       return 0;
-}
-
 /**
  * It gets and then prints the link status.
  *
@@ -3170,18 +3158,6 @@ ixgbe_dev_interrupt_action(struct rte_eth_dev *dev)
        return 0;
 }
 
-static int
-ixgbevf_dev_interrupt_action(struct rte_eth_dev *dev)
-{
-       struct ixgbe_hw *hw =
-               IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-
-       PMD_DRV_LOG(DEBUG, "enable intr immediately");
-       ixgbevf_intr_enable(hw);
-       rte_intr_enable(&dev->pci_dev->intr_handle);
-       return 0;
-}
-
 /**
  * Interrupt handler which shall be registered for alarm callback for delayed
  * handling specific interrupt to wait for the stable nic state. As the
@@ -3244,16 +3220,6 @@ ixgbe_dev_interrupt_handler(__rte_unused struct rte_intr_handle *handle,
        ixgbe_dev_interrupt_action(dev);
 }
 
-static void
-ixgbevf_dev_interrupt_handler(__rte_unused struct rte_intr_handle *handle,
-                             void *param)
-{
-       struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
-
-       ixgbevf_dev_interrupt_get_status(dev);
-       ixgbevf_dev_interrupt_action(dev);
-}
-
 static int
 ixgbe_dev_led_on(struct rte_eth_dev *dev)
 {
@@ -3862,11 +3828,11 @@ ixgbevf_dev_start(struct rte_eth_dev *dev)
        ixgbevf_dev_rxtx_start(dev);
 
        /* check and configure queue intr-vector mapping */
-       if (dev->data->dev_conf.intr_conf.rxq != 0)
+       if (dev->data->dev_conf.intr_conf.rxq != 0) {
                intr_vector = dev->data->nb_rx_queues;
-
-       if (rte_intr_efd_enable(intr_handle, intr_vector))
-               return -1;
+               if (rte_intr_efd_enable(intr_handle, intr_vector))
+                       return -1;
+       }
 
        if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
                intr_handle->intr_vec =
@@ -3880,16 +3846,6 @@ ixgbevf_dev_start(struct rte_eth_dev *dev)
        }
        ixgbevf_configure_msix(dev);
 
-       if (dev->data->dev_conf.intr_conf.lsc != 0) {
-               if (rte_intr_allow_others(intr_handle))
-                       rte_intr_callback_register(intr_handle,
-                                       ixgbevf_dev_interrupt_handler,
-                                       (void *)dev);
-               else
-                       PMD_INIT_LOG(INFO, "lsc won't enable because of"
-                                    " no intr multiplex\n");
-       }
-
        rte_intr_enable(intr_handle);
 
        /* Re-enable interrupt for VF */
@@ -3935,7 +3891,6 @@ static void
 ixgbevf_dev_close(struct rte_eth_dev *dev)
 {
        struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-       struct rte_pci_device *pci_dev;
 
        PMD_INIT_FUNC_TRACE();
 
@@ -3947,12 +3902,6 @@ ixgbevf_dev_close(struct rte_eth_dev *dev)
 
        /* reprogram the RAR[0] in case user changed it. */
        ixgbe_set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
-
-       pci_dev = dev->pci_dev;
-       if (pci_dev->intr_handle.intr_vec) {
-               rte_free(pci_dev->intr_handle.intr_vec);
-               pci_dev->intr_handle.intr_vec = NULL;
-       }
 }
 
 static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on)
@@ -4478,7 +4427,8 @@ ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
                IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
        mask = IXGBE_READ_REG(hw, IXGBE_VTEIMS);
-       mask |= (1 << queue_id);
+       mask |= (1 << IXGBE_MISC_VEC_ID);
+       RTE_SET_USED(queue_id);
        IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
 
        rte_intr_enable(&dev->pci_dev->intr_handle);
@@ -4494,7 +4444,8 @@ ixgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
                IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
        mask = IXGBE_READ_REG(hw, IXGBE_VTEIMS);
-       mask &= ~(1 << queue_id);
+       mask &= ~(1 << IXGBE_MISC_VEC_ID);
+       RTE_SET_USED(queue_id);
        IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
 
        return 0;
@@ -4630,7 +4581,7 @@ ixgbevf_configure_msix(struct rte_eth_dev *dev)
        struct ixgbe_hw *hw =
                IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
        uint32_t q_idx;
-       uint32_t vector_idx = 0;
+       uint32_t vector_idx = IXGBE_MISC_VEC_ID;
 
        /* won't configure msix register if no mapping is done
         * between intr vector and event fd.
@@ -4647,7 +4598,7 @@ ixgbevf_configure_msix(struct rte_eth_dev *dev)
                intr_handle->intr_vec[q_idx] = vector_idx;
        }
 
-       /* Configure VF Rx queue ivar */
+       /* Configure VF other cause ivar */
        ixgbevf_set_ivar_map(hw, -1, 1, vector_idx);
 }
 
@@ -4662,7 +4613,8 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
        struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;
        struct ixgbe_hw *hw =
                IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-       uint32_t queue_id, vec = 0;
+       uint32_t queue_id, base = IXGBE_MISC_VEC_ID;
+       uint32_t vec = IXGBE_MISC_VEC_ID;
        uint32_t mask;
        uint32_t gpie;
 
@@ -4672,6 +4624,9 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
        if (!rte_intr_dp_is_en(intr_handle))
                return;
 
+       if (rte_intr_allow_others(intr_handle))
+               vec = base = IXGBE_RX_VEC_START;
+
        /* setup GPIE for MSI-x mode */
        gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
        gpie |= IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
@@ -4695,23 +4650,23 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
                /* by default, 1:1 mapping */
                ixgbe_set_ivar_map(hw, 0, queue_id, vec);
                intr_handle->intr_vec[queue_id] = vec;
-               if (vec < intr_handle->nb_efd - 1)
+               if (vec < base + intr_handle->nb_efd - 1)
                        vec++;
        }
 
        switch (hw->mac.type) {
        case ixgbe_mac_82598EB:
                ixgbe_set_ivar_map(hw, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
-                                  intr_handle->max_intr - 1);
+                                  IXGBE_MISC_VEC_ID);
                break;
        case ixgbe_mac_82599EB:
        case ixgbe_mac_X540:
-               ixgbe_set_ivar_map(hw, -1, 1, intr_handle->max_intr - 1);
+               ixgbe_set_ivar_map(hw, -1, 1, IXGBE_MISC_VEC_ID);
                break;
        default:
                break;
        }
-       IXGBE_WRITE_REG(hw, IXGBE_EITR(queue_id),
+       IXGBE_WRITE_REG(hw, IXGBE_EITR(IXGBE_MISC_VEC_ID),
                        IXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT & 0xFFF);
 
        /* set up to autoclear timer, and the vectors */