net/ngbe: support jumbo frame

[dpdk.git] / drivers / net / ixgbe / ixgbe_ipsec.c

diff --git a/drivers/net/ixgbe/ixgbe_ipsec.c b/drivers/net/ixgbe/ixgbe_ipsec.c
index 48f5082..944c9f2 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_ipsec.c
+++ b/drivers/net/ixgbe/ixgbe_ipsec.c
@@ -2,8 +2,8 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
-#include <rte_ethdev_driver.h>
-#include <rte_ethdev_pci.h>
+#include <ethdev_driver.h>
+#include <ethdev_pci.h>
 #include <rte_ip.h>
 #include <rte_jhash.h>
 #include <rte_security_driver.h>
@@ -392,7 +392,7 @@ ixgbe_crypto_create_session(void *device,
        aead_xform = &conf->crypto_xform->aead;
 
        if (conf->ipsec.direction == RTE_SECURITY_IPSEC_SA_DIR_INGRESS) {
-               if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_SECURITY) {
+               if (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_SECURITY) {
                        ic_session->op = IXGBE_OP_AUTHENTICATED_DECRYPTION;
                } else {
                        PMD_DRV_LOG(ERR, "IPsec decryption not enabled\n");
@@ -400,7 +400,7 @@ ixgbe_crypto_create_session(void *device,
                        return -ENOTSUP;
                }
        } else {
-               if (dev_conf->txmode.offloads & DEV_TX_OFFLOAD_SECURITY) {
+               if (dev_conf->txmode.offloads & RTE_ETH_TX_OFFLOAD_SECURITY) {
                        ic_session->op = IXGBE_OP_AUTHENTICATED_ENCRYPTION;
                } else {
                        PMD_DRV_LOG(ERR, "IPsec encryption not enabled\n");
@@ -484,7 +484,8 @@ ixgbe_crypto_update_mb(void *device __rte_unused,
                        get_sec_session_private_data(session);
        if (ic_session->op == IXGBE_OP_AUTHENTICATED_ENCRYPTION) {
                union ixgbe_crypto_tx_desc_md *mdata =
-                       (union ixgbe_crypto_tx_desc_md *)&m->udata64;
+                       (union ixgbe_crypto_tx_desc_md *)
+                               rte_security_dynfield(m);
                mdata->enc = 1;
                mdata->sa_idx = ic_session->sa_index;
                mdata->pad_len = ixgbe_crypto_compute_pad_len(m);
@@ -632,11 +633,11 @@ ixgbe_crypto_enable_ipsec(struct rte_eth_dev *dev)
        tx_offloads = dev->data->dev_conf.txmode.offloads;
 
        /* sanity checks */
-       if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO) {
+       if (rx_offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) {
                PMD_DRV_LOG(ERR, "RSC and IPsec not supported");
                return -1;
        }
-       if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
+       if (rx_offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC) {
                PMD_DRV_LOG(ERR, "HW CRC strip needs to be enabled for IPsec");
                return -1;
        }
@@ -656,7 +657,7 @@ ixgbe_crypto_enable_ipsec(struct rte_eth_dev *dev)
        reg |= IXGBE_HLREG0_TXCRCEN | IXGBE_HLREG0_RXCRCSTRP;
        IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg);
 
-       if (rx_offloads & DEV_RX_OFFLOAD_SECURITY) {
+       if (rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) {
                IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, 0);
                reg = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL);
                if (reg != 0) {
@@ -664,7 +665,7 @@ ixgbe_crypto_enable_ipsec(struct rte_eth_dev *dev)
                        return -1;
                }
        }
-       if (tx_offloads & DEV_TX_OFFLOAD_SECURITY) {
+       if (tx_offloads & RTE_ETH_TX_OFFLOAD_SECURITY) {
                IXGBE_WRITE_REG(hw, IXGBE_SECTXCTRL,
                                IXGBE_SECTXCTRL_STORE_FORWARD);
                reg = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL);
@@ -751,5 +752,7 @@ ixgbe_ipsec_ctx_create(struct rte_eth_dev *dev)
                        return -ENOMEM;
                }
        }
+       if (rte_security_dynfield_register() < 0)
+               return -rte_errno;
        return 0;
 }