ethdev: rename DCB field in config structs

[dpdk.git] / drivers / net / ixgbe / ixgbe_rxtx.c

diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index e031817..6a62d67 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -2647,11 +2647,13 @@ ixgbe_rss_disable(struct rte_eth_dev *dev)
 {
        struct ixgbe_hw *hw;
        uint32_t mrqc;
+       uint32_t mrqc_reg;
 
        hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-       mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
+       mrqc_reg = ixgbe_mrqc_reg_get(hw->mac.type);
+       mrqc = IXGBE_READ_REG(hw, mrqc_reg);
        mrqc &= ~IXGBE_MRQC_RSSEN;
-       IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
+       IXGBE_WRITE_REG(hw, mrqc_reg, mrqc);
 }
 
 static void
@@ -2662,6 +2664,11 @@ ixgbe_hw_rss_hash_set(struct ixgbe_hw *hw, struct rte_eth_rss_conf *rss_conf)
        uint32_t rss_key;
        uint64_t rss_hf;
        uint16_t i;
+       uint32_t mrqc_reg;
+       uint32_t rssrk_reg;
+
+       mrqc_reg = ixgbe_mrqc_reg_get(hw->mac.type);
+       rssrk_reg = ixgbe_rssrk_reg_get(hw->mac.type, 0);
 
        hash_key = rss_conf->rss_key;
        if (hash_key != NULL) {
@@ -2671,7 +2678,7 @@ ixgbe_hw_rss_hash_set(struct ixgbe_hw *hw, struct rte_eth_rss_conf *rss_conf)
                        rss_key |= hash_key[(i * 4) + 1] << 8;
                        rss_key |= hash_key[(i * 4) + 2] << 16;
                        rss_key |= hash_key[(i * 4) + 3] << 24;
-                       IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RSSRK(0), i, rss_key);
+                       IXGBE_WRITE_REG_ARRAY(hw, rssrk_reg, i, rss_key);
                }
        }
 
@@ -2696,7 +2703,7 @@ ixgbe_hw_rss_hash_set(struct ixgbe_hw *hw, struct rte_eth_rss_conf *rss_conf)
                mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
        if (rss_hf & ETH_RSS_IPV6_UDP_EX)
                mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
-       IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
+       IXGBE_WRITE_REG(hw, mrqc_reg, mrqc);
 }
 
 int
@@ -2706,9 +2713,17 @@ ixgbe_dev_rss_hash_update(struct rte_eth_dev *dev,
        struct ixgbe_hw *hw;
        uint32_t mrqc;
        uint64_t rss_hf;
+       uint32_t mrqc_reg;
 
        hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
+       if (!ixgbe_rss_update_sp(hw->mac.type)) {
+               PMD_DRV_LOG(ERR, "RSS hash update is not supported on this "
+                       "NIC.");
+               return -ENOTSUP;
+       }
+       mrqc_reg = ixgbe_mrqc_reg_get(hw->mac.type);
+
        /*
         * Excerpt from section 7.1.2.8 Receive-Side Scaling (RSS):
         *     "RSS enabling cannot be done dynamically while it must be
@@ -2719,7 +2734,7 @@ ixgbe_dev_rss_hash_update(struct rte_eth_dev *dev,
         * disabled at initialization time.
         */
        rss_hf = rss_conf->rss_hf & IXGBE_RSS_OFFLOAD_ALL;
-       mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
+       mrqc = IXGBE_READ_REG(hw, mrqc_reg);
        if (!(mrqc & IXGBE_MRQC_RSSEN)) { /* RSS disabled */
                if (rss_hf != 0) /* Enable RSS */
                        return -(EINVAL);
@@ -2742,13 +2757,17 @@ ixgbe_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
        uint32_t rss_key;
        uint64_t rss_hf;
        uint16_t i;
+       uint32_t mrqc_reg;
+       uint32_t rssrk_reg;
 
        hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+       mrqc_reg = ixgbe_mrqc_reg_get(hw->mac.type);
+       rssrk_reg = ixgbe_rssrk_reg_get(hw->mac.type, 0);
        hash_key = rss_conf->rss_key;
        if (hash_key != NULL) {
                /* Return RSS hash key */
                for (i = 0; i < 10; i++) {
-                       rss_key = IXGBE_READ_REG_ARRAY(hw, IXGBE_RSSRK(0), i);
+                       rss_key = IXGBE_READ_REG_ARRAY(hw, rssrk_reg, i);
                        hash_key[(i * 4)] = rss_key & 0x000000FF;
                        hash_key[(i * 4) + 1] = (rss_key >> 8) & 0x000000FF;
                        hash_key[(i * 4) + 2] = (rss_key >> 16) & 0x000000FF;
@@ -2757,7 +2776,7 @@ ixgbe_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
        }
 
        /* Get RSS functions configured in MRQC register */
-       mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
+       mrqc = IXGBE_READ_REG(hw, mrqc_reg);
        if ((mrqc & IXGBE_MRQC_RSSEN) == 0) { /* RSS is disabled */
                rss_conf->rss_hf = 0;
                return 0;
@@ -2793,22 +2812,28 @@ ixgbe_rss_configure(struct rte_eth_dev *dev)
        uint32_t reta;
        uint16_t i;
        uint16_t j;
+       uint16_t sp_reta_size;
+       uint32_t reta_reg;
 
        PMD_INIT_FUNC_TRACE();
        hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
+       sp_reta_size = ixgbe_reta_size_get(hw->mac.type);
+
        /*
         * Fill in redirection table
         * The byte-swap is needed because NIC registers are in
         * little-endian order.
         */
        reta = 0;
-       for (i = 0, j = 0; i < 128; i++, j++) {
+       for (i = 0, j = 0; i < sp_reta_size; i++, j++) {
+               reta_reg = ixgbe_reta_reg_get(hw->mac.type, i);
+
                if (j == dev->data->nb_rx_queues)
                        j = 0;
                reta = (reta << 8) | j;
                if ((i & 3) == 3)
-                       IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2),
+                       IXGBE_WRITE_REG(hw, reta_reg,
                                        rte_bswap32(reta));
        }
 
@@ -2903,7 +2928,7 @@ ixgbe_vmdq_dcb_configure(struct rte_eth_dev *dev)
                 * mapping is done with 3 bits per priority,
                 * so shift by i*3 each time
                 */
-               queue_mapping |= ((cfg->dcb_queue[i] & 0x07) << (i * 3));
+               queue_mapping |= ((cfg->dcb_tc[i] & 0x07) << (i * 3));
 
        IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, queue_mapping);
 
@@ -3038,7 +3063,7 @@ ixgbe_vmdq_dcb_rx_config(struct rte_eth_dev *dev,
        }
        /* User Priority to Traffic Class mapping */
        for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {
-               j = vmdq_rx_conf->dcb_queue[i];
+               j = vmdq_rx_conf->dcb_tc[i];
                tc = &dcb_config->tc_config[j];
                tc->path[IXGBE_DCB_RX_CONFIG].up_to_tc_bitmap =
                                                (uint8_t)(1 << j);
@@ -3066,7 +3091,7 @@ ixgbe_dcb_vt_tx_config(struct rte_eth_dev *dev,
 
        /* User Priority to Traffic Class mapping */
        for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {
-               j = vmdq_tx_conf->dcb_queue[i];
+               j = vmdq_tx_conf->dcb_tc[i];
                tc = &dcb_config->tc_config[j];
                tc->path[IXGBE_DCB_TX_CONFIG].up_to_tc_bitmap =
                                                (uint8_t)(1 << j);
@@ -3088,7 +3113,7 @@ ixgbe_dcb_rx_config(struct rte_eth_dev *dev,
 
        /* User Priority to Traffic Class mapping */
        for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {
-               j = rx_conf->dcb_queue[i];
+               j = rx_conf->dcb_tc[i];
                tc = &dcb_config->tc_config[j];
                tc->path[IXGBE_DCB_RX_CONFIG].up_to_tc_bitmap =
                                                (uint8_t)(1 << j);
@@ -3109,7 +3134,7 @@ ixgbe_dcb_tx_config(struct rte_eth_dev *dev,
 
        /* User Priority to Traffic Class mapping */
        for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {
-               j = tx_conf->dcb_queue[i];
+               j = tx_conf->dcb_tc[i];
                tc = &dcb_config->tc_config[j];
                tc->path[IXGBE_DCB_TX_CONFIG].up_to_tc_bitmap =
                                                (uint8_t)(1 << j);
@@ -3940,7 +3965,9 @@ ixgbe_set_rx_function(struct rte_eth_dev *dev)
         */
        } else if (adapter->rx_vec_allowed) {
                PMD_INIT_LOG(DEBUG, "Vector rx enabled, please make sure RX "
-                                  "burst size no less than 32.");
+                                   "burst size no less than %d (port=%d).",
+                            RTE_IXGBE_DESCS_PER_LOOP,
+                            dev->data->port_id);
 
                dev->rx_pkt_burst = ixgbe_recv_pkts_vec;
        } else if (adapter->rx_bulk_alloc_allowed) {