net/mvpp2: support raw flow pattern

[dpdk.git] / drivers / net / ixgbe / ixgbe_rxtx.c

diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index 6cfbb58..72d27f3 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -33,7 +33,7 @@
 #include <rte_malloc.h>
 #include <rte_mbuf.h>
 #include <rte_ether.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
 #include <rte_security_driver.h>
 #include <rte_prefetch.h>
 #include <rte_udp.h>
@@ -1369,6 +1369,31 @@ const uint32_t
                RTE_PTYPE_INNER_L3_IPV4_EXT | RTE_PTYPE_INNER_L4_UDP,
 };
 
+int
+ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
+{
+       volatile union ixgbe_adv_rx_desc *rxdp;
+       struct ixgbe_rx_queue *rxq = rx_queue;
+       uint16_t desc;
+
+       desc = rxq->rx_tail;
+       rxdp = &rxq->rx_ring[desc];
+       /* watch for changes in status bit */
+       pmc->addr = &rxdp->wb.upper.status_error;
+
+       /*
+        * we expect the DD bit to be set to 1 if this descriptor was already
+        * written to.
+        */
+       pmc->val = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+       pmc->mask = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+
+       /* the registers are 32-bit */
+       pmc->size = sizeof(uint32_t);
+
+       return 0;
+}
+
 /* @note: fix ixgbe_dev_supported_ptypes_get() if any change here. */
 static inline uint32_t
 ixgbe_rxd_pkt_info_to_pkt_type(uint32_t pkt_info, uint16_t ptype_mask)
@@ -4898,15 +4923,11 @@ ixgbe_set_rsc(struct rte_eth_dev *dev)
        /* RFCTL configuration  */
        rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
        if ((rsc_capable) && (rx_conf->offloads & DEV_RX_OFFLOAD_TCP_LRO))
-               /*
-                * Since NFS packets coalescing is not supported - clear
-                * RFCTL.NFSW_DIS and RFCTL.NFSR_DIS when RSC is
-                * enabled.
-                */
-               rfctl &= ~(IXGBE_RFCTL_RSC_DIS | IXGBE_RFCTL_NFSW_DIS |
-                          IXGBE_RFCTL_NFSR_DIS);
+               rfctl &= ~IXGBE_RFCTL_RSC_DIS;
        else
                rfctl |= IXGBE_RFCTL_RSC_DIS;
+       /* disable NFS filtering */
+       rfctl |= IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS;
        IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
 
        /* If LRO hasn't been requested - we are done here. */
@@ -5634,8 +5655,12 @@ ixgbevf_dev_rx_init(struct rte_eth_dev *dev)
         * ixgbevf_rlpml_set_vf even if jumbo frames are not used. This way,
         * VF packets received can work in all cases.
         */
-       ixgbevf_rlpml_set_vf(hw,
-               (uint16_t)dev->data->dev_conf.rxmode.max_rx_pkt_len);
+       if (ixgbevf_rlpml_set_vf(hw,
+           (uint16_t)dev->data->dev_conf.rxmode.max_rx_pkt_len)) {
+               PMD_INIT_LOG(ERR, "Set max packet length to %d failed.",
+                            dev->data->dev_conf.rxmode.max_rx_pkt_len);
+               return -EINVAL;
+       }
 
        /*
         * Assume no header split and no VLAN strip support