net/ngbe: support device xstats

[dpdk.git] / drivers / net / mlx4 / mlx4_rxtx.c

diff --git a/drivers/net/mlx4/mlx4_rxtx.c b/drivers/net/mlx4/mlx4_rxtx.c
index 8c88eff..ed9e41f 100644 (file)
--- a/drivers/net/mlx4/mlx4_rxtx.c
+++ b/drivers/net/mlx4/mlx4_rxtx.c
@@ -8,7 +8,7 @@
  * Data plane functions for mlx4 driver.
  */
 
-#include <assert.h>
+#include <stdbool.h>
 #include <stdint.h>
 #include <string.h>
 
@@ -263,7 +263,7 @@ mlx4_txq_stamp_freed_wqe(struct mlx4_sq *sq, volatile uint32_t *start,
        uint32_t stamp = sq->stamp;
        int32_t size = (intptr_t)end - (intptr_t)start;
 
-       assert(start != end);
+       MLX4_ASSERT(start != end);
        /* Hold SQ ring wrap around. */
        if (size < 0) {
                size = (int32_t)sq->size + size;
@@ -320,7 +320,7 @@ mlx4_txq_complete(struct txq *txq, const unsigned int elts_m,
                if (unlikely(!!(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK) ^
                    !!(cons_index & cq->cqe_cnt)))
                        break;
-#ifndef NDEBUG
+#ifdef RTE_LIBRTE_MLX4_DEBUG
                /*
                 * Make sure we read the CQE after we read the ownership bit.
                 */
@@ -335,7 +335,7 @@ mlx4_txq_complete(struct txq *txq, const unsigned int elts_m,
                              cqe_err->syndrome);
                        break;
                }
-#endif /* NDEBUG */
+#endif /* RTE_LIBRTE_MLX4_DEBUG */
                cons_index++;
        } while (1);
        completed = (cons_index - cq->cons_index) * txq->elts_comp_cd_init;
@@ -406,7 +406,7 @@ mlx4_tx_burst_tso_get_params(struct rte_mbuf *buf,
 {
        struct mlx4_sq *sq = &txq->msq;
        const uint8_t tunneled = txq->priv->hw_csum_l2tun &&
-                                (buf->ol_flags & PKT_TX_TUNNEL_MASK);
+                                (buf->ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK);
 
        tinfo->tso_header_size = buf->l2_len + buf->l3_len + buf->l4_len;
        if (tunneled)
@@ -487,14 +487,14 @@ mlx4_tx_burst_fill_tso_dsegs(struct rte_mbuf *buf,
                                ((uintptr_t)dseg & (MLX4_TXBB_SIZE - 1))) >>
                               MLX4_SEG_SHIFT;
                switch (nb_segs_txbb) {
-#ifndef NDEBUG
+#ifdef RTE_LIBRTE_MLX4_DEBUG
                default:
                        /* Should never happen. */
                        rte_panic("%p: Invalid number of SGEs(%d) for a TXBB",
                        (void *)txq, nb_segs_txbb);
                        /* rte_panic never returns. */
                        break;
-#endif /* NDEBUG */
+#endif /* RTE_LIBRTE_MLX4_DEBUG */
                case 4:
                        /* Memory region key for this memory pool. */
                        lkey = mlx4_tx_mb2mr(txq, sbuf);
@@ -890,12 +890,12 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
        volatile struct mlx4_wqe_ctrl_seg *ctrl;
        struct txq_elt *elt;
 
-       assert(txq->elts_comp_cd != 0);
+       MLX4_ASSERT(txq->elts_comp_cd != 0);
        if (likely(max >= txq->elts_comp_cd_init))
                mlx4_txq_complete(txq, elts_m, sq);
        max = elts_n - max;
-       assert(max >= 1);
-       assert(max <= elts_n);
+       MLX4_ASSERT(max >= 1);
+       MLX4_ASSERT(max <= elts_n);
        /* Always leave one free entry in the ring. */
        --max;
        if (max > pkts_n)
@@ -915,16 +915,12 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
                        uint16_t flags16[2];
                } srcrb;
                uint32_t lkey;
-               bool tso = txq->priv->tso && (buf->ol_flags & PKT_TX_TCP_SEG);
+               bool tso = txq->priv->tso && (buf->ol_flags & RTE_MBUF_F_TX_TCP_SEG);
 
                /* Clean up old buffer. */
                if (likely(elt->buf != NULL)) {
                        struct rte_mbuf *tmp = elt->buf;
 
-#ifndef NDEBUG
-                       /* Poisoning. */
-                       memset(&elt->buf, 0x66, sizeof(struct rte_mbuf *));
-#endif
                        /* Faster than rte_pktmbuf_free(). */
                        do {
                                struct rte_mbuf *next = tmp->next;
@@ -995,15 +991,15 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
                /* Enable HW checksum offload if requested */
                if (txq->csum &&
                    (buf->ol_flags &
-                    (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM))) {
+                    (RTE_MBUF_F_TX_IP_CKSUM | RTE_MBUF_F_TX_TCP_CKSUM | RTE_MBUF_F_TX_UDP_CKSUM))) {
                        const uint64_t is_tunneled = (buf->ol_flags &
-                                                     (PKT_TX_TUNNEL_GRE |
-                                                      PKT_TX_TUNNEL_VXLAN));
+                                                     (RTE_MBUF_F_TX_TUNNEL_GRE |
+                                                      RTE_MBUF_F_TX_TUNNEL_VXLAN));
 
                        if (is_tunneled && txq->csum_l2tun) {
                                owner_opcode |= MLX4_WQE_CTRL_IIP_HDR_CSUM |
                                                MLX4_WQE_CTRL_IL4_HDR_CSUM;
-                               if (buf->ol_flags & PKT_TX_OUTER_IP_CKSUM)
+                               if (buf->ol_flags & RTE_MBUF_F_TX_OUTER_IP_CKSUM)
                                        srcrb.flags |=
                                            RTE_BE32(MLX4_WQE_CTRL_IP_HDR_CSUM);
                        } else {
@@ -1048,7 +1044,7 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
        /* Make sure that descriptors are written before doorbell record. */
        rte_wmb();
        /* Ring QP doorbell. */
-       rte_write32(txq->msq.doorbell_qpn, txq->msq.db);
+       rte_write32(txq->msq.doorbell_qpn, MLX4_TX_BFREG(txq));
        txq->elts_head += i;
        return i;
 }
@@ -1116,18 +1112,18 @@ rxq_cq_to_ol_flags(uint32_t flags, int csum, int csum_l2tun)
                ol_flags |=
                        mlx4_transpose(flags,
                                       MLX4_CQE_STATUS_IP_HDR_CSUM_OK,
-                                      PKT_RX_IP_CKSUM_GOOD) |
+                                      RTE_MBUF_F_RX_IP_CKSUM_GOOD) |
                        mlx4_transpose(flags,
                                       MLX4_CQE_STATUS_TCP_UDP_CSUM_OK,
-                                      PKT_RX_L4_CKSUM_GOOD);
+                                      RTE_MBUF_F_RX_L4_CKSUM_GOOD);
        if ((flags & MLX4_CQE_L2_TUNNEL) && csum_l2tun)
                ol_flags |=
                        mlx4_transpose(flags,
                                       MLX4_CQE_L2_TUNNEL_IPOK,
-                                      PKT_RX_IP_CKSUM_GOOD) |
+                                      RTE_MBUF_F_RX_IP_CKSUM_GOOD) |
                        mlx4_transpose(flags,
                                       MLX4_CQE_L2_TUNNEL_L4_CSUM,
-                                      PKT_RX_L4_CKSUM_GOOD);
+                                      RTE_MBUF_F_RX_L4_CKSUM_GOOD);
        return ol_flags;
 }
 
@@ -1193,9 +1189,9 @@ mlx4_cq_poll_one(struct rxq *rxq, volatile struct mlx4_cqe **out)
         * ownership bit.
         */
        rte_rmb();
-       assert(!(cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK));
-       assert((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) !=
-              MLX4_CQE_OPCODE_ERROR);
+       MLX4_ASSERT(!(cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK));
+       MLX4_ASSERT((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) !=
+                   MLX4_CQE_OPCODE_ERROR);
        ret = rte_be_to_cpu_32(cqe->byte_cnt);
        ++cq->cons_index;
 out:
@@ -1251,7 +1247,7 @@ mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
                                break;
                        }
                        while (pkt != seg) {
-                               assert(pkt != (*rxq->elts)[idx]);
+                               MLX4_ASSERT(pkt != (*rxq->elts)[idx]);
                                rep = pkt->next;
                                pkt->next = NULL;
                                pkt->nb_segs = 1;
@@ -1274,14 +1270,14 @@ mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
                                goto skip;
                        }
                        pkt = seg;
-                       assert(len >= (rxq->crc_present << 2));
+                       MLX4_ASSERT(len >= (rxq->crc_present << 2));
                        /* Update packet information. */
                        pkt->packet_type =
                                rxq_cq_to_pkt_type(cqe, rxq->l2tun_offload);
-                       pkt->ol_flags = PKT_RX_RSS_HASH;
+                       pkt->ol_flags = RTE_MBUF_F_RX_RSS_HASH;
                        pkt->hash.rss = cqe->immed_rss_invalid;
                        if (rxq->crc_present)
-                               len -= ETHER_CRC_LEN;
+                               len -= RTE_ETHER_CRC_LEN;
                        pkt->pkt_len = len;
                        if (rxq->csum | rxq->csum_l2tun) {
                                uint32_t flags =
@@ -1365,6 +1361,7 @@ mlx4_tx_burst_removed(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
        (void)dpdk_txq;
        (void)pkts;
        (void)pkts_n;
+       rte_mb();
        return 0;
 }
 
@@ -1390,5 +1387,6 @@ mlx4_rx_burst_removed(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
        (void)dpdk_rxq;
        (void)pkts;
        (void)pkts_n;
+       rte_mb();
        return 0;
 }