net/mlx5: add queue and RSS HW steering action

[dpdk.git] / drivers / net / mlx5 / linux / mlx5_verbs.c

diff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c
index 73c4413..b6ba21c 100644 (file)
--- a/drivers/net/mlx5/linux/mlx5_verbs.c
+++ b/drivers/net/mlx5/linux/mlx5_verbs.c
@@ -926,7 +926,7 @@ mlx5_txq_ibv_uar_init(struct mlx5_txq_ctrl *txq_ctrl, void *bf_reg)
                DRV_LOG(ERR, "Failed to get mem page size");
                rte_errno = ENOMEM;
        }
-       txq->db_heu = priv->sh->cdev->config.dbnc == MLX5_TXDB_HEURISTIC;
+       txq->db_heu = priv->sh->cdev->config.dbnc == MLX5_SQ_DB_HEURISTIC;
        txq->db_nc = mlx5_db_map_type_get(uar_mmap_offset, page_size);
        ppriv->uar_table[txq->idx].db = bf_reg;
 #ifndef RTE_ARCH_64
@@ -1035,6 +1035,10 @@ mlx5_txq_ibv_obj_new(struct rte_eth_dev *dev, uint16_t idx)
        txq_data->wqe_pi = 0;
        txq_data->wqe_comp = 0;
        txq_data->wqe_thres = txq_data->wqe_s / MLX5_TX_COMP_THRESH_INLINE_DIV;
+       txq_data->wait_on_time = !!(!priv->sh->config.tx_pp &&
+                                priv->sh->cdev->config.hca_attr.wait_on_time &&
+                                txq_data->offloads &
+                                RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP);
 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
        /*
         * If using DevX need to query and store TIS transport domain value.