net/mlx5: advertise the detach capability

[dpdk.git] / drivers / net / mlx5 / mlx5.c

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 06622dd..5fd0e76 100644 (file)
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -246,8 +246,10 @@ static const struct eth_dev_ops mlx5_dev_ops = {
        .filter_ctrl = mlx5_dev_filter_ctrl,
        .rx_descriptor_status = mlx5_rx_descriptor_status,
        .tx_descriptor_status = mlx5_tx_descriptor_status,
+#ifdef HAVE_UPDATE_CQ_CI
        .rx_queue_intr_enable = mlx5_rx_intr_enable,
        .rx_queue_intr_disable = mlx5_rx_intr_disable,
+#endif
 };
 
 static struct {
@@ -611,13 +613,6 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
                priv->pd = pd;
                priv->mtu = ETHER_MTU;
                priv->mps = mps; /* Enable MPW by default if supported. */
-               /* Set default values for Enhanced MPW, a.k.a MPWv2. */
-               if (mps == MLX5_MPW_ENHANCED) {
-                       priv->mpw_hdr_dseg = 0;
-                       priv->txqs_inline = MLX5_EMPW_MIN_TXQS;
-                       priv->inline_max_packet_sz = MLX5_EMPW_MAX_INLINE_LEN;
-                       priv->txq_inline = MLX5_WQE_SIZE_MAX - MLX5_WQE_SIZE;
-               }
                priv->cqe_comp = 1; /* Enable compression by default. */
                priv->tunnel_en = tunnel_en;
                err = mlx5_args(&args, pci_dev->device.devargs);
@@ -689,6 +684,17 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
                INFO("%sMPS is %s",
                     priv->mps == MLX5_MPW_ENHANCED ? "Enhanced " : "",
                     priv->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
+               /* Set default values for Enhanced MPW, a.k.a MPWv2. */
+               if (priv->mps == MLX5_MPW_ENHANCED) {
+                       if (args.txqs_inline == MLX5_ARG_UNSET)
+                               priv->txqs_inline = MLX5_EMPW_MIN_TXQS;
+                       if (args.inline_max_packet_sz == MLX5_ARG_UNSET)
+                               priv->inline_max_packet_sz =
+                                       MLX5_EMPW_MAX_INLINE_LEN;
+                       if (args.txq_inline == MLX5_ARG_UNSET)
+                               priv->txq_inline = MLX5_WQE_SIZE_MAX -
+                                                  MLX5_WQE_SIZE;
+               }
                /* Allocate and register default RSS hash keys. */
                priv->rss_conf = rte_calloc(__func__, hash_rxq_init_n,
                                            sizeof((*priv->rss_conf)[0]), 0);
@@ -782,9 +788,11 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
 
                eth_dev->device = &pci_dev->device;
                rte_eth_copy_pci_info(eth_dev, pci_dev);
+               eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
                eth_dev->device->driver = &mlx5_driver.driver;
                priv->dev = eth_dev;
                eth_dev->dev_ops = &mlx5_dev_ops;
+               TAILQ_INIT(&priv->flows);
 
                /* Bring Ethernet device up. */
                DEBUG("forcing Ethernet interface up");
@@ -888,7 +896,7 @@ rte_mlx5_pmd_init(void)
         */
        setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
        ibv_fork_init();
-       rte_eal_pci_register(&mlx5_driver);
+       rte_pci_register(&mlx5_driver);
 }
 
 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);