net/mlx5: rearrange device attribute structure

[dpdk.git] / drivers / net / mlx5 / mlx5.c

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index a713391..7487b1f 100644 (file)
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -513,6 +513,46 @@ mlx5_flow_aging_init(struct mlx5_dev_ctx_shared *sh)
        }
 }
 
+/**
+ * DV flow counter mode detect and config.
+ *
+ * @param dev
+ *   Pointer to rte_eth_dev structure.
+ *
+ */
+void
+mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
+{
+#ifdef HAVE_IBV_FLOW_DV_SUPPORT
+       struct mlx5_priv *priv = dev->data->dev_private;
+       struct mlx5_dev_ctx_shared *sh = priv->sh;
+       struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
+       bool fallback;
+
+#ifndef HAVE_IBV_DEVX_ASYNC
+       fallback = true;
+#else
+       fallback = false;
+       if (!sh->cdev->config.devx || !priv->config.dv_flow_en ||
+           !hca_attr->flow_counters_dump ||
+           !(hca_attr->flow_counter_bulk_alloc_bitmap & 0x4) ||
+           (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
+               fallback = true;
+#endif
+       if (fallback)
+               DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
+                       "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
+                       hca_attr->flow_counters_dump,
+                       hca_attr->flow_counter_bulk_alloc_bitmap);
+       /* Initialize fallback mode only on the port initializes sh. */
+       if (sh->refcnt == 1)
+               sh->cmng.counter_fallback = fallback;
+       else if (fallback != sh->cmng.counter_fallback)
+               DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
+                       "with others:%d.", PORT_ID(priv), fallback);
+#endif
+}
+
 /**
  * Initialize the counters management structure.
  *
@@ -1129,6 +1169,43 @@ mlx5_setup_tis(struct mlx5_dev_ctx_shared *sh)
        return 0;
 }
 
+/**
+ * Configure realtime timestamp format.
+ *
+ * @param sh
+ *   Pointer to mlx5_dev_ctx_shared object.
+ * @param config
+ *   Device configuration parameters.
+ * @param hca_attr
+ *   Pointer to DevX HCA capabilities structure.
+ */
+void
+mlx5_rt_timestamp_config(struct mlx5_dev_ctx_shared *sh,
+                        struct mlx5_dev_config *config,
+                        struct mlx5_hca_attr *hca_attr)
+{
+       uint32_t dw_cnt = MLX5_ST_SZ_DW(register_mtutc);
+       uint32_t reg[dw_cnt];
+       int ret = ENOTSUP;
+
+       if (hca_attr->access_register_user)
+               ret = mlx5_devx_cmd_register_read(sh->cdev->ctx,
+                                                 MLX5_REGISTER_ID_MTUTC, 0,
+                                                 reg, dw_cnt);
+       if (!ret) {
+               uint32_t ts_mode;
+
+               /* MTUTC register is read successfully. */
+               ts_mode = MLX5_GET(register_mtutc, reg, time_stamp_mode);
+               if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
+                       config->rt_timestamp = 1;
+       } else {
+               /* Kernel does not support register reading. */
+               if (hca_attr->dev_freq_khz == (NS_PER_S / MS_PER_S))
+                       config->rt_timestamp = 1;
+       }
+}
+
 /**
  * Allocate shared device context. If there is multiport device the
  * master and representors will share this context, if there is single
@@ -1182,12 +1259,12 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,
        pthread_mutex_init(&sh->txpp.mutex, NULL);
        sh->numa_node = spawn->cdev->dev->numa_node;
        sh->cdev = spawn->cdev;
-       sh->devx = sh->cdev->config.devx;
+       sh->esw_mode = !!(spawn->info.master || spawn->info.representor);
        if (spawn->bond_info)
                sh->bond = *spawn->bond_info;
-       err = mlx5_os_get_dev_attr(sh->cdev, &sh->device_attr);
+       err = mlx5_os_capabilities_prepare(sh);
        if (err) {
-               DRV_LOG(DEBUG, "mlx5_os_get_dev_attr() failed");
+               DRV_LOG(ERR, "Fail to configure device capabilities.");
                goto error;
        }
        sh->refcnt = 1;
@@ -1205,7 +1282,7 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,
                sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
                sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
        }
-       if (sh->devx) {
+       if (sh->cdev->config.devx) {
                sh->td = mlx5_devx_cmd_create_td(sh->cdev->ctx);
                if (!sh->td) {
                        DRV_LOG(ERR, "TD allocation failure");