uint32_t tunnel_lro_vxlan:1;
uint32_t lro_max_msg_sz_mode:2;
uint32_t lro_timer_supported_periods[MLX5_LRO_NUM_SUPP_PERIODS];
+ uint32_t flex_parser_protocols;
};
/* Flow list . */
uint32_t vport_meta_tag; /* Used for vport index match ove VF LAG. */
uint32_t vport_meta_mask; /* Used for vport index field match mask. */
int32_t representor_id; /* Port representor identifier. */
+ int32_t pf_bond; /* >=0 means PF index in bonding configuration. */
unsigned int if_index; /* Associated kernel network device index. */
/* RX/TX queues. */
unsigned int rxqs_n; /* RX queues array size. */
uint64_t offset);
int mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev,
struct rte_eth_udp_tunnel *udp_tunnel);
-uint16_t mlx5_eth_find_next(uint16_t port_id);
+uint16_t mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev);
/* Macro to iterate over all valid ports for mlx5 driver. */
-#define MLX5_ETH_FOREACH_DEV(port_id) \
- for (port_id = mlx5_eth_find_next(0); \
+#define MLX5_ETH_FOREACH_DEV(port_id, pci_dev) \
+ for (port_id = mlx5_eth_find_next(0, pci_dev); \
port_id < RTE_MAX_ETHPORTS; \
- port_id = mlx5_eth_find_next(port_id + 1))
+ port_id = mlx5_eth_find_next(port_id + 1, pci_dev))
/* mlx5_ethdev.c */