mlx5: handle link status interrupts

[dpdk.git] / drivers / net / mlx5 / mlx5.h

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 29fc1da..0daacc8 100644 (file)
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -58,6 +58,7 @@
 #include <rte_ether.h>
 #include <rte_ethdev.h>
 #include <rte_spinlock.h>
+#include <rte_interrupts.h>
 #ifdef PEDANTIC
 #pragma GCC diagnostic error "-pedantic"
 #endif
@@ -101,6 +102,7 @@ struct priv {
        unsigned int hw_csum:1; /* Checksum offload is supported. */
        unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
        unsigned int vf:1; /* This is a VF device. */
+       unsigned int pending_alarm:1; /* An alarm is pending. */
        /* RX/TX queues. */
        unsigned int rxqs_n; /* RX queues array size. */
        unsigned int txqs_n; /* TX queues array size. */
@@ -109,9 +111,13 @@ struct priv {
        /* Indirection tables referencing all RX WQs. */
        struct ibv_exp_rwq_ind_table *(*ind_tables)[];
        unsigned int ind_tables_n; /* Number of indirection tables. */
+       unsigned int ind_table_max_size; /* Maximum indirection table size. */
        /* Hash RX QPs feeding the indirection table. */
        struct hash_rxq (*hash_rxqs)[];
        unsigned int hash_rxqs_n; /* Hash RX QPs array size. */
+       /* RSS configuration array indexed by hash RX queue type. */
+       struct rte_eth_rss_conf *(*rss_conf)[];
+       struct rte_intr_handle intr_handle; /* Interrupt handler. */
        rte_spinlock_t lock; /* Lock for control functions. */
 };
 
@@ -154,6 +160,10 @@ int mlx5_dev_get_flow_ctrl(struct rte_eth_dev *, struct rte_eth_fc_conf *);
 int mlx5_dev_set_flow_ctrl(struct rte_eth_dev *, struct rte_eth_fc_conf *);
 int mlx5_ibv_device_to_pci_addr(const struct ibv_device *,
                                struct rte_pci_addr *);
+void mlx5_dev_link_status_handler(void *);
+void mlx5_dev_interrupt_handler(struct rte_intr_handle *, void *);
+void priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
+void priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
 
 /* mlx5_mac.c */
 
@@ -168,6 +178,13 @@ int priv_mac_addrs_enable(struct priv *);
 void mlx5_mac_addr_add(struct rte_eth_dev *, struct ether_addr *, uint32_t,
                       uint32_t);
 
+/* mlx5_rss.c */
+
+int rss_hash_rss_conf_new_key(struct priv *, const uint8_t *, unsigned int,
+                             uint64_t);
+int mlx5_rss_hash_update(struct rte_eth_dev *, struct rte_eth_rss_conf *);
+int mlx5_rss_hash_conf_get(struct rte_eth_dev *, struct rte_eth_rss_conf *);
+
 /* mlx5_rxmode.c */
 
 int priv_promiscuous_enable(struct priv *);