net/ice/base: add more macros for FDID priority

[dpdk.git] / drivers / net / mlx5 / mlx5.h

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index b24851d..563d6ab 100644 (file)
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -112,12 +112,15 @@ struct mlx5_xstats_ctrl {
        /* Index in the device counters table. */
        uint16_t dev_table_idx[MLX5_MAX_XSTATS];
        uint64_t base[MLX5_MAX_XSTATS];
+       uint64_t xstats[MLX5_MAX_XSTATS];
+       uint64_t hw_stats[MLX5_MAX_XSTATS];
        struct mlx5_counter_ctrl info[MLX5_MAX_XSTATS];
 };
 
 struct mlx5_stats_ctrl {
        /* Base for imissed counter. */
        uint64_t imissed_base;
+       uint64_t imissed;
 };
 
 /* Flow list . */
@@ -191,6 +194,7 @@ struct mlx5_dev_config {
        unsigned int tso_max_payload_sz; /* Maximum TCP payload for TSO. */
        unsigned int ind_table_max_size; /* Maximum indirection table size. */
        unsigned int max_dump_files_num; /* Maximum dump files per queue. */
+       unsigned int log_hp_size; /* Single hairpin queue data size in total. */
        int txqs_inline; /* Queue number threshold for inlining. */
        int txq_inline_min; /* Minimal amount of data bytes to inline. */
        int txq_inline_max; /* Max packet size for inlining with SEND. */
@@ -517,6 +521,8 @@ struct mlx5_priv {
        struct mlx5_drop drop_queue; /* Flow drop queues. */
        struct mlx5_flows flows; /* RTE Flow rules. */
        struct mlx5_flows ctrl_flows; /* Control flow rules. */
+       void *inter_flows; /* Intermediate resources for flow creation. */
+       int flow_idx; /* Intermediate device flow index. */
        LIST_HEAD(rxq, mlx5_rxq_ctrl) rxqsctrl; /* DPDK Rx queues. */
        LIST_HEAD(rxqobj, mlx5_rxq_obj) rxqsobj; /* Verbs/DevX Rx queues. */
        LIST_HEAD(hrxq, mlx5_hrxq) hrxqs; /* Verbs Hash Rx queues. */
@@ -728,6 +734,8 @@ int mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list);
 void mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list);
 int mlx5_flow_start_default(struct rte_eth_dev *dev);
 void mlx5_flow_stop_default(struct rte_eth_dev *dev);
+void mlx5_flow_alloc_intermediate(struct rte_eth_dev *dev);
+void mlx5_flow_free_intermediate(struct rte_eth_dev *dev);
 int mlx5_flow_verify(struct rte_eth_dev *dev);
 int mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev, uint32_t queue);
 int mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,