net/ice: support new devices

[dpdk.git] / drivers / net / mlx5 / mlx5.h

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 431f861..865e72d 100644 (file)
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -676,9 +676,80 @@ TAILQ_HEAD(mlx5_flow_meters, mlx5_flow_meter);
 #define MLX5_PROC_PRIV(port_id) \
        ((struct mlx5_proc_priv *)rte_eth_devices[port_id].process_private)
 
+enum mlx5_rxq_obj_type {
+       MLX5_RXQ_OBJ_TYPE_IBV,          /* mlx5_rxq_obj with ibv_wq. */
+       MLX5_RXQ_OBJ_TYPE_DEVX_RQ,      /* mlx5_rxq_obj with mlx5_devx_rq. */
+       MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN,
+       /* mlx5_rxq_obj with mlx5_devx_rq and hairpin support. */
+};
+
+/* Verbs/DevX Rx queue elements. */
+struct mlx5_rxq_obj {
+       LIST_ENTRY(mlx5_rxq_obj) next; /* Pointer to the next element. */
+       struct mlx5_rxq_ctrl *rxq_ctrl; /* Back pointer to parent. */
+       enum mlx5_rxq_obj_type type;
+       int fd; /* File descriptor for event channel */
+       RTE_STD_C11
+       union {
+               struct {
+                       void *wq; /* Work Queue. */
+                       void *ibv_cq; /* Completion Queue. */
+                       void *ibv_channel;
+               };
+               struct {
+                       struct mlx5_devx_obj *rq; /* DevX Rx Queue object. */
+                       struct mlx5_devx_obj *devx_cq; /* DevX CQ object. */
+                       void *devx_channel;
+               };
+       };
+};
+
+/* Indirection table. */
+struct mlx5_ind_table_obj {
+       LIST_ENTRY(mlx5_ind_table_obj) next; /* Pointer to the next element. */
+       rte_atomic32_t refcnt; /* Reference counter. */
+       RTE_STD_C11
+       union {
+               void *ind_table; /**< Indirection table. */
+               struct mlx5_devx_obj *rqt; /* DevX RQT object. */
+       };
+       uint32_t queues_n; /**< Number of queues in the list. */
+       uint16_t queues[]; /**< Queue list. */
+};
+
+/* Hash Rx queue. */
+struct mlx5_hrxq {
+       ILIST_ENTRY(uint32_t)next; /* Index to the next element. */
+       rte_atomic32_t refcnt; /* Reference counter. */
+       struct mlx5_ind_table_obj *ind_table; /* Indirection table. */
+       RTE_STD_C11
+       union {
+               void *qp; /* Verbs queue pair. */
+               struct mlx5_devx_obj *tir; /* DevX TIR object. */
+       };
+#ifdef HAVE_IBV_FLOW_DV_SUPPORT
+       void *action; /* DV QP action pointer. */
+#endif
+       uint64_t hash_fields; /* Verbs Hash fields. */
+       uint32_t rss_key_len; /* Hash key length in bytes. */
+       uint8_t rss_key[]; /* Hash key. */
+};
+
 /* HW objects operations structure. */
 struct mlx5_obj_ops {
        int (*rxq_obj_modify_vlan_strip)(struct mlx5_rxq_obj *rxq_obj, int on);
+       int (*rxq_obj_new)(struct rte_eth_dev *dev, uint16_t idx);
+       int (*rxq_event_get)(struct mlx5_rxq_obj *rxq_obj);
+       int (*rxq_obj_modify)(struct mlx5_rxq_obj *rxq_obj, bool is_start);
+       void (*rxq_obj_release)(struct mlx5_rxq_obj *rxq_obj);
+       int (*ind_table_new)(struct rte_eth_dev *dev, const unsigned int log_n,
+                            struct mlx5_ind_table_obj *ind_tbl);
+       void (*ind_table_destroy)(struct mlx5_ind_table_obj *ind_tbl);
+       int (*hrxq_new)(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq,
+                       int tunnel __rte_unused);
+       void (*hrxq_destroy)(struct mlx5_hrxq *hrxq);
+       int (*drop_action_create)(struct rte_eth_dev *dev);
+       void (*drop_action_destroy)(struct rte_eth_dev *dev);
 };
 
 struct mlx5_priv {
@@ -724,7 +795,7 @@ struct mlx5_priv {
        void *rss_desc; /* Intermediate rss description resources. */
        int flow_idx; /* Intermediate device flow index. */
        int flow_nested_idx; /* Intermediate device flow index, nested. */
-       struct mlx5_obj_ops *obj_ops; /* HW objects operations. */
+       struct mlx5_obj_ops obj_ops; /* HW objects operations. */
        LIST_HEAD(rxq, mlx5_rxq_ctrl) rxqsctrl; /* DPDK Rx queues. */
        LIST_HEAD(rxqobj, mlx5_rxq_obj) rxqsobj; /* Verbs/DevX Rx queues. */
        uint32_t hrxqs; /* Verbs Hash Rx queues. */
@@ -853,8 +924,6 @@ void mlx5_os_stats_init(struct rte_eth_dev *dev);
 void mlx5_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index);
 int mlx5_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
                      uint32_t index, uint32_t vmdq);
-struct mlx5_nl_vlan_vmwa_context *mlx5_vlan_vmwa_init
-                                   (struct rte_eth_dev *dev, uint32_t ifindex);
 int mlx5_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr);
 int mlx5_set_mc_addr_list(struct rte_eth_dev *dev,
                        struct rte_ether_addr *mc_addr_set,
@@ -897,11 +966,15 @@ int mlx5_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
 int mlx5_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on);
 void mlx5_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on);
 int mlx5_vlan_offload_set(struct rte_eth_dev *dev, int mask);
-void mlx5_vlan_vmwa_exit(struct mlx5_nl_vlan_vmwa_context *ctx);
+
+/* mlx5_vlan_os.c */
+
+void mlx5_vlan_vmwa_exit(void *ctx);
 void mlx5_vlan_vmwa_release(struct rte_eth_dev *dev,
                            struct mlx5_vf_vlan *vf_vlan);
 void mlx5_vlan_vmwa_acquire(struct rte_eth_dev *dev,
                            struct mlx5_vf_vlan *vf_vlan);
+void *mlx5_vlan_vmwa_init(struct rte_eth_dev *dev, uint32_t ifindex);
 
 /* mlx5_trigger.c */