net/ice: remove VSI update on DCF reset by PF

[dpdk.git] / drivers / net / mlx5 / mlx5.h

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 6f5a78b..a3b2a3d 100644 (file)
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -270,9 +270,6 @@ struct mlx5_dev_config {
                /* Rx queue count threshold to enable MPRQ. */
        } mprq; /* Configurations for Multi-Packet RQ. */
        int mps; /* Multi-packet send supported mode. */
-       unsigned int flow_prio; /* Number of flow priorities. */
-       enum modify_reg flow_mreg_c[MLX5_MREG_C_NUM];
-       /* Availibility of mreg_c's. */
        unsigned int tso_max_payload_sz; /* Maximum TCP payload for TSO. */
        unsigned int ind_table_max_size; /* Maximum indirection table size. */
        unsigned int max_dump_files_num; /* Maximum dump files per queue. */
@@ -996,7 +993,7 @@ struct mlx5_dev_txpp {
        uint32_t tick; /* Completion tick duration in nanoseconds. */
        uint32_t test; /* Packet pacing test mode. */
        int32_t skew; /* Scheduling skew. */
-       struct rte_intr_handle intr_handle; /* Periodic interrupt. */
+       struct rte_intr_handle *intr_handle; /* Periodic interrupt. */
        void *echan; /* Event Channel. */
        struct mlx5_txpp_wq clock_queue; /* Clock Queue. */
        struct mlx5_txpp_wq rearm_queue; /* Clock Queue. */
@@ -1098,6 +1095,12 @@ struct mlx5_aso_ct_pools_mng {
        struct mlx5_aso_sq aso_sq; /* ASO queue objects. */
 };
 
+/* LAG attr. */
+struct mlx5_lag {
+       uint8_t tx_remap_affinity[16]; /* The PF port number of affinity */
+       uint8_t affinity_mode; /* TIS or hash based affinity */
+};
+
 /*
  * Shared Infiniband device context for Master/Representors
  * which belong to same IB device with multiple IB ports.
@@ -1114,6 +1117,10 @@ struct mlx5_dev_ctx_shared {
        uint32_t tunnel_header_0_1:1; /* tunnel_header_0_1 is supported. */
        uint32_t misc5_cap:1; /* misc5 matcher parameter is supported. */
        uint32_t reclaim_mode:1; /* Reclaim memory. */
+       uint32_t dr_drop_action_en:1; /* Use DR drop action. */
+       uint32_t drop_action_check_flag:1; /* Check Flag for drop action. */
+       uint32_t flow_priority_check_flag:1; /* Check Flag for flow priority. */
+       uint32_t metadata_regc_check_flag:1; /* Check Flag for metadata REGC. */
        uint32_t max_port; /* Maximal IB device port index. */
        struct mlx5_bond_info bond; /* Bonding information. */
        struct mlx5_common_device *cdev; /* Backend mlx5 device. */
@@ -1154,11 +1161,12 @@ struct mlx5_dev_ctx_shared {
        struct mlx5_indexed_pool *ipool[MLX5_IPOOL_MAX];
        struct mlx5_indexed_pool *mdh_ipools[MLX5_MAX_MODIFY_NUM];
        /* Shared interrupt handler section. */
-       struct rte_intr_handle intr_handle; /* Interrupt handler for device. */
-       struct rte_intr_handle intr_handle_devx; /* DEVX interrupt handler. */
+       struct rte_intr_handle *intr_handle; /* Interrupt handler for device. */
+       struct rte_intr_handle *intr_handle_devx; /* DEVX interrupt handler. */
        void *devx_comp; /* DEVX async comp obj. */
-       struct mlx5_devx_obj *tis; /* TIS object. */
+       struct mlx5_devx_obj *tis[16]; /* TIS object. */
        struct mlx5_devx_obj *td; /* Transport domain. */
+       struct mlx5_lag lag; /* LAG attributes */
        void *tx_uar; /* Tx/packet pacing shared UAR. */
        struct mlx5_flex_parser_profiles fp[MLX5_FLEX_PARSER_MAX];
        /* Flex parser profiles information. */
@@ -1173,6 +1181,9 @@ struct mlx5_dev_ctx_shared {
        struct mlx5_aso_ct_pools_mng *ct_mng;
        /* Management data for ASO connection tracking. */
        struct mlx5_lb_ctx self_lb; /* QP to enable self loopback for Devx. */
+       unsigned int flow_max_priority;
+       enum modify_reg flow_mreg_c[MLX5_MREG_C_NUM];
+       /* Availability of mreg_c's. */
        struct mlx5_dev_shared_port port[]; /* per device port data array. */
 };
 
@@ -1196,7 +1207,7 @@ TAILQ_HEAD(mlx5_legacy_flow_meters, mlx5_legacy_flow_meter);
 struct mlx5_flow_rss_desc {
        uint32_t level;
        uint32_t queue_num; /**< Number of entries in @p queue. */
-       uint64_t types; /**< Specific RSS hash types (see ETH_RSS_*). */
+       uint64_t types; /**< Specific RSS hash types (see RTE_ETH_RSS_*). */
        uint64_t hash_fields; /* Verbs Hash fields. */
        uint8_t key[MLX5_RSS_HASH_KEY_LEN]; /**< RSS hash key. */
        uint32_t key_len; /**< RSS hash key len. */
@@ -1418,6 +1429,7 @@ struct mlx5_priv {
        uint32_t rss_shared_actions; /* RSS shared actions. */
        struct mlx5_devx_obj *q_counters; /* DevX queue counter object. */
        uint32_t counter_set_id; /* Queue counter ID to set in DevX objects. */
+       uint32_t lag_affinity_idx; /* LAG mode queue 0 affinity starting. */
 };
 
 #define PORT_ID(priv) ((priv)->dev_data->port_id)
@@ -1664,6 +1676,8 @@ int mlx5_ctrl_flow(struct rte_eth_dev *dev,
                   struct rte_flow_item_eth *eth_mask);
 int mlx5_flow_lacp_miss(struct rte_eth_dev *dev);
 struct rte_flow *mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev);
+uint32_t mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev,
+                                           uint32_t txq);
 void mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
                                       uint64_t async_id, int status);
 void mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh);
@@ -1675,7 +1689,7 @@ int mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
 int mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow,
                        FILE *file, struct rte_flow_error *error);
 int save_dump_file(const unsigned char *data, uint32_t size,
-               uint32_t type, uint32_t id, void *arg, FILE *file);
+               uint32_t type, uint64_t id, void *arg, FILE *file);
 int mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
        struct rte_flow_query_count *count, struct rte_flow_error *error);
 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
@@ -1704,6 +1718,7 @@ int mlx5_mp_os_req_queue_control(struct rte_eth_dev *dev, uint16_t queue_id,
 /* mlx5_socket.c */
 
 int mlx5_pmd_socket_init(void);
+void mlx5_pmd_socket_uninit(void);
 
 /* mlx5_flow_meter.c */
 
@@ -1747,6 +1762,7 @@ int mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable);
 int mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable);
 int mlx5_os_set_nonblock_channel_fd(int fd);
 void mlx5_os_mac_addr_flush(struct rte_eth_dev *dev);
+void mlx5_os_net_cleanup(void);
 
 /* mlx5_txpp.c */