#include "mlx5_utils.h"
#include "mlx5_os.h"
#include "mlx5_autoconf.h"
-
+#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
+#include "mlx5_dr.h"
+#endif
#define MLX5_SH(dev) (((struct mlx5_priv *)(dev)->data->dev_private)->sh)
int tx_skew; /* Tx scheduling skew between WQE and data on wire. */
uint32_t reclaim_mode:2; /* Memory reclaim mode. */
uint32_t dv_esw_en:1; /* Enable E-Switch DV flow. */
- uint32_t dv_flow_en:1; /* Enable DV flow. */
+ /* Enable DV flow. 1 means SW steering, 2 means HW steering. */
+ unsigned int dv_flow_en:2;
uint32_t dv_xmeta_en:2; /* Enable extensive flow metadata. */
uint32_t dv_miss_info:1; /* Restore packet after partial hw miss. */
uint32_t l3_vxlan_en:1; /* Enable L3 VXLAN flow creation. */
uint16_t refcnt; /* Reference count for representors. */
};
+/* HW steering queue job descriptor type. */
+enum {
+ MLX5_HW_Q_JOB_TYPE_CREATE, /* Flow create job type. */
+ MLX5_HW_Q_JOB_TYPE_DESTROY, /* Flow destroy job type. */
+};
+
+/* HW steering flow management job descriptor. */
+struct mlx5_hw_q_job {
+ uint32_t type; /* Job type. */
+ struct rte_flow *flow; /* Flow attached to the job. */
+ void *user_data; /* Job user data. */
+};
+
+/* HW steering job descriptor LIFO pool. */
+struct mlx5_hw_q {
+ uint32_t job_idx; /* Free job index. */
+ uint32_t size; /* LIFO size. */
+ struct mlx5_hw_q_job **job; /* LIFO header. */
+} __rte_cache_aligned;
+
#define MLX5_COUNTERS_PER_POOL 512
#define MLX5_MAX_PENDING_QUERIES 4
#define MLX5_CNT_CONTAINER_RESIZE 64
#define MLX5_CNT_ARRAY_IDX(pool, cnt) \
((int)(((uint8_t *)(cnt) - (uint8_t *)((pool) + 1)) / \
MLX5_CNT_LEN(pool)))
+#define MLX5_TS_MASK_SECS 8ull
+/* timestamp wrapping in seconds, must be power of 2. */
+
/*
* The pool index and offset of counter in the pool array makes up the
* counter index. In case the counter is from pool 0 and offset 0, it
struct mlx5_flex_item flex_item[MLX5_PORT_FLEX_ITEM_NUM];
/* Flex items have been created on the port. */
uint32_t flex_item_map; /* Map of allocated flex item elements. */
+#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
+ struct mlx5dr_context *dr_ctx; /**< HW steering DR context. */
+ uint32_t nb_queue; /* HW steering queue number. */
+ /* HW steering queue polling mechanism job descriptor LIFO. */
+ struct mlx5_hw_q *hw_q;
+#endif
};
#define PORT_ID(priv) ((priv)->dev_data->port_id)
void mlx5_rt_timestamp_config(struct mlx5_dev_ctx_shared *sh,
struct mlx5_hca_attr *hca_attr);
struct mlx5_dev_ctx_shared *
-mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn);
+mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,
+ struct mlx5_kvargs_ctrl *mkvlist);
void mlx5_free_shared_dev_ctx(struct mlx5_dev_ctx_shared *sh);
int mlx5_dev_ctx_shared_mempool_subscribe(struct rte_eth_dev *dev);
void mlx5_free_table_hash_list(struct mlx5_priv *priv);
int mlx5_alloc_table_hash_list(struct mlx5_priv *priv);
void mlx5_set_min_inline(struct mlx5_priv *priv);
void mlx5_set_metadata_mask(struct rte_eth_dev *dev);
-int mlx5_probe_again_args_validate(struct mlx5_common_device *cdev);
-int mlx5_port_args_config(struct mlx5_priv *priv, struct rte_devargs *devargs,
+int mlx5_probe_again_args_validate(struct mlx5_common_device *cdev,
+ struct mlx5_kvargs_ctrl *mkvlist);
+int mlx5_port_args_config(struct mlx5_priv *priv,
+ struct mlx5_kvargs_ctrl *mkvlist,
struct mlx5_port_config *config);
+void mlx5_port_args_set_used(const char *name, uint16_t port_id,
+ struct mlx5_kvargs_ctrl *mkvlist);
bool mlx5_flex_parser_ecpri_exist(struct rte_eth_dev *dev);
int mlx5_flex_parser_ecpri_alloc(struct rte_eth_dev *dev);
void mlx5_flow_counter_mode_config(struct rte_eth_dev *dev);
uint32_t mlx5_counter_alloc(struct rte_eth_dev *dev);
void mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt);
int mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
- bool clear, uint64_t *pkts, uint64_t *bytes);
+ bool clear, uint64_t *pkts, uint64_t *bytes, void **action);
int mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow,
FILE *file, struct rte_flow_error *error);
int save_dump_file(const unsigned char *data, uint32_t size,
struct rte_pci_driver;
int mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh);
void mlx5_os_free_shared_dr(struct mlx5_priv *priv);
-int mlx5_os_net_probe(struct mlx5_common_device *cdev);
+int mlx5_os_net_probe(struct mlx5_common_device *cdev,
+ struct mlx5_kvargs_ctrl *mkvlist);
void mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh);
void mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh);
void mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index);