net/mlx5: recover secondary process Rx errors

[dpdk.git] / drivers / net / mlx5 / mlx5.h

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 97f4c8d..f779b46 100644 (file)
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -61,6 +61,13 @@ enum mlx5_mp_req_type {
        MLX5_MP_REQ_CREATE_MR,
        MLX5_MP_REQ_START_RXTX,
        MLX5_MP_REQ_STOP_RXTX,
+       MLX5_MP_REQ_QUEUE_STATE_MODIFY,
+};
+
+struct mlx5_mp_arg_queue_state_modify {
+       uint8_t is_wq; /* Set if WQ. */
+       uint16_t queue_id; /* DPDK queue ID. */
+       enum ibv_wq_state state; /* WQ requested state. */
 };
 
 /* Pameters for IPC. */
@@ -71,6 +78,8 @@ struct mlx5_mp_param {
        RTE_STD_C11
        union {
                uintptr_t addr; /* MLX5_MP_REQ_CREATE_MR */
+               struct mlx5_mp_arg_queue_state_modify state_modify;
+               /* MLX5_MP_REQ_QUEUE_STATE_MODIFY */
        } args;
 };
 
@@ -99,7 +108,7 @@ struct mlx5_switch_info {
        uint64_t switch_id; /**< Switch identifier. */
 };
 
-LIST_HEAD(mlx5_dev_list, mlx5_priv);
+LIST_HEAD(mlx5_dev_list, mlx5_ibv_shared);
 
 /* Shared data between primary and secondary processes. */
 struct mlx5_shared_data {
@@ -204,6 +213,7 @@ struct mlx5_dev_config {
        unsigned int flow_prio; /* Number of flow priorities. */
        unsigned int tso_max_payload_sz; /* Maximum TCP payload for TSO. */
        unsigned int ind_table_max_size; /* Maximum indirection table size. */
+       unsigned int max_dump_files_num; /* Maximum dump files per queue. */
        int txq_inline; /* Maximum packet size for inlining. */
        int txqs_inline; /* Queue number threshold for inlining. */
        int txqs_vec; /* Queue number threshold for vectorized Tx. */
@@ -275,17 +285,28 @@ struct mlx5_ibv_shared {
        char ibdev_name[IBV_SYSFS_NAME_MAX]; /* IB device name. */
        char ibdev_path[IBV_SYSFS_PATH_MAX]; /* IB device path for secondary */
        struct ibv_device_attr_ex device_attr; /* Device properties. */
+       struct rte_pci_device *pci_dev; /* Backend PCI device. */
+       LIST_ENTRY(mlx5_ibv_shared) mem_event_cb;
+       /**< Called by memory event callback. */
+       struct {
+               uint32_t dev_gen; /* Generation number to flush local caches. */
+               rte_rwlock_t rwlock; /* MR Lock. */
+               struct mlx5_mr_btree cache; /* Global MR cache table. */
+               struct mlx5_mr_list mr_list; /* Registered MR list. */
+               struct mlx5_mr_list mr_free_list; /* Freed MR list. */
+       } mr;
        /* Shared DV/DR flow data section. */
        pthread_mutex_t dv_mutex; /* DV context mutex. */
        uint32_t dv_refcnt; /* DV/DR data reference counter. */
-       void *fdb_ns; /* FDB Direct Rules name space handle. */
+       void *fdb_domain; /* FDB Direct Rules name space handle. */
        struct mlx5_flow_tbl_resource fdb_tbl[MLX5_MAX_TABLES_FDB];
        /* FDB Direct Rules tables. */
-       void *rx_ns; /* RX Direct Rules name space handle. */
+       void *rx_domain; /* RX Direct Rules name space handle. */
        struct mlx5_flow_tbl_resource rx_tbl[MLX5_MAX_TABLES];
        /* RX Direct Rules tables. */
-       void *tx_ns; /* TX Direct Rules name space handle. */
+       void *tx_domain; /* TX Direct Rules name space handle. */
        struct mlx5_flow_tbl_resource tx_tbl[MLX5_MAX_TABLES];
+       void *esw_drop_action; /* Pointer to DR E-Switch drop action. */
        /* TX Direct Rules tables/ */
        LIST_HEAD(matchers, mlx5_flow_dv_matcher) matchers;
        LIST_HEAD(encap_decap, mlx5_flow_dv_encap_decap_resource) encaps_decaps;
@@ -313,12 +334,10 @@ struct mlx5_proc_priv {
        ((struct mlx5_proc_priv *)rte_eth_devices[port_id].process_private)
 
 struct mlx5_priv {
-       LIST_ENTRY(mlx5_priv) mem_event_cb;
-       /**< Called by memory event callback. */
        struct rte_eth_dev_data *dev_data;  /* Pointer to device data. */
        struct mlx5_ibv_shared *sh; /* Shared IB device context. */
        uint32_t ibv_port; /* IB device port number. */
-       struct ether_addr mac[MLX5_MAX_MAC_ADDRESSES]; /* MAC addresses. */
+       struct rte_ether_addr mac[MLX5_MAX_MAC_ADDRESSES]; /* MAC addresses. */
        BITFIELD_DECLARE(mac_own, uint64_t, MLX5_MAX_MAC_ADDRESSES);
        /* Bit-field of MAC addresses owned by the PMD. */
        uint16_t vlan_filter[MLX5_MAX_VLAN_IDS]; /* VLAN filters table. */
@@ -346,13 +365,6 @@ struct mlx5_priv {
        struct mlx5_flows ctrl_flows; /* Control flow rules. */
        LIST_HEAD(counters, mlx5_flow_counter) flow_counters;
        /* Flow counters. */
-       struct {
-               uint32_t dev_gen; /* Generation number to flush local caches. */
-               rte_rwlock_t rwlock; /* MR Lock. */
-               struct mlx5_mr_btree cache; /* Global MR cache table. */
-               struct mlx5_mr_list mr_list; /* Registered MR list. */
-               struct mlx5_mr_list mr_free_list; /* Freed MR list. */
-       } mr;
        LIST_HEAD(rxq, mlx5_rxq_ctrl) rxqsctrl; /* DPDK Rx queues. */
        LIST_HEAD(rxqibv, mlx5_rxq_ibv) rxqsibv; /* Verbs Rx queues. */
        LIST_HEAD(hrxq, mlx5_hrxq) hrxqs; /* Verbs Hash Rx queues. */
@@ -402,6 +414,7 @@ int mlx5_set_flags(struct rte_eth_dev *dev, unsigned int keep,
                   unsigned int flags);
 int mlx5_dev_configure(struct rte_eth_dev *dev);
 void mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info);
+int mlx5_read_clock(struct rte_eth_dev *dev, uint64_t *clock);
 int mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size);
 const uint32_t *mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev);
 int mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete);
@@ -435,16 +448,19 @@ void mlx5_nl_check_switch_info(bool nun_vf_set,
                               struct mlx5_switch_info *switch_info);
 void mlx5_translate_port_name(const char *port_name_in,
                              struct mlx5_switch_info *port_info_out);
+void mlx5_intr_callback_unregister(const struct rte_intr_handle *handle,
+                                  rte_intr_callback_fn cb_fn, void *cb_arg);
 
 /* mlx5_mac.c */
 
-int mlx5_get_mac(struct rte_eth_dev *dev, uint8_t (*mac)[ETHER_ADDR_LEN]);
+int mlx5_get_mac(struct rte_eth_dev *dev, uint8_t (*mac)[RTE_ETHER_ADDR_LEN]);
 void mlx5_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index);
-int mlx5_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac,
+int mlx5_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
                      uint32_t index, uint32_t vmdq);
-int mlx5_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr);
+int mlx5_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr);
 int mlx5_set_mc_addr_list(struct rte_eth_dev *dev,
-                         struct ether_addr *mc_addr_set, uint32_t nb_mc_addr);
+                       struct rte_ether_addr *mc_addr_set,
+                       uint32_t nb_mc_addr);
 
 /* mlx5_rss.c */
 
@@ -539,17 +555,19 @@ void mlx5_mp_req_start_rxtx(struct rte_eth_dev *dev);
 void mlx5_mp_req_stop_rxtx(struct rte_eth_dev *dev);
 int mlx5_mp_req_mr_create(struct rte_eth_dev *dev, uintptr_t addr);
 int mlx5_mp_req_verbs_cmd_fd(struct rte_eth_dev *dev);
-void mlx5_mp_init_primary(void);
+int mlx5_mp_req_queue_state_modify(struct rte_eth_dev *dev,
+                                  struct mlx5_mp_arg_queue_state_modify *sm);
+int mlx5_mp_init_primary(void);
 void mlx5_mp_uninit_primary(void);
-void mlx5_mp_init_secondary(void);
+int mlx5_mp_init_secondary(void);
 void mlx5_mp_uninit_secondary(void);
 
 /* mlx5_nl.c */
 
 int mlx5_nl_init(int protocol);
-int mlx5_nl_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac,
+int mlx5_nl_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
                         uint32_t index);
-int mlx5_nl_mac_addr_remove(struct rte_eth_dev *dev, struct ether_addr *mac,
+int mlx5_nl_mac_addr_remove(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
                            uint32_t index);
 void mlx5_nl_mac_addr_sync(struct rte_eth_dev *dev);
 void mlx5_nl_mac_addr_flush(struct rte_eth_dev *dev);