net/mlx5: fix LRO configuration in drop Rx queue
[dpdk.git] / drivers / net / mlx5 / mlx5_devx.c
index e57787c..03c0fac 100644 (file)
@@ -88,7 +88,7 @@ mlx5_devx_modify_rq(struct mlx5_rxq_priv *rxq, uint8_t type)
        default:
                break;
        }
-       if (rxq->ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
+       if (rxq->ctrl->is_hairpin)
                return mlx5_devx_cmd_modify_rq(rxq->ctrl->obj->rq, &rq_attr);
        return mlx5_devx_cmd_modify_rq(rxq->devx_rq.rq, &rq_attr);
 }
@@ -162,7 +162,7 @@ mlx5_rxq_devx_obj_release(struct mlx5_rxq_priv *rxq)
 
        if (rxq_obj == NULL)
                return;
-       if (rxq_obj->rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN) {
+       if (rxq_obj->rxq_ctrl->is_hairpin) {
                if (rxq_obj->rq == NULL)
                        return;
                mlx5_devx_modify_rq(rxq, MLX5_RXQ_MOD_RDY2RST);
@@ -476,7 +476,7 @@ mlx5_rxq_devx_obj_new(struct mlx5_rxq_priv *rxq)
 
        MLX5_ASSERT(rxq_data);
        MLX5_ASSERT(tmpl);
-       if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
+       if (rxq_ctrl->is_hairpin)
                return mlx5_rxq_obj_hairpin_new(rxq);
        tmpl->rxq_ctrl = rxq_ctrl;
        if (rxq_ctrl->irq && !rxq_ctrl->started) {
@@ -580,13 +580,21 @@ mlx5_devx_ind_table_create_rqt_attr(struct rte_eth_dev *dev,
                return rqt_attr;
        }
        for (i = 0; i != queues_n; ++i) {
-               struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, queues[i]);
+               if (mlx5_is_external_rxq(dev, queues[i])) {
+                       struct mlx5_external_rxq *ext_rxq =
+                                       mlx5_ext_rxq_get(dev, queues[i]);
 
-               MLX5_ASSERT(rxq != NULL);
-               if (rxq->ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
-                       rqt_attr->rq_list[i] = rxq->ctrl->obj->rq->id;
-               else
-                       rqt_attr->rq_list[i] = rxq->devx_rq.rq->id;
+                       rqt_attr->rq_list[i] = ext_rxq->hw_id;
+               } else {
+                       struct mlx5_rxq_priv *rxq =
+                                       mlx5_rxq_get(dev, queues[i]);
+
+                       MLX5_ASSERT(rxq != NULL);
+                       if (rxq->ctrl->is_hairpin)
+                               rqt_attr->rq_list[i] = rxq->ctrl->obj->rq->id;
+                       else
+                               rqt_attr->rq_list[i] = rxq->devx_rq.rq->id;
+               }
        }
        MLX5_ASSERT(i > 0);
        for (j = 0; i != rqt_n; ++j, ++i)
@@ -706,17 +714,19 @@ mlx5_devx_tir_attr_set(struct rte_eth_dev *dev, const uint8_t *rss_key,
                       int tunnel, struct mlx5_devx_tir_attr *tir_attr)
 {
        struct mlx5_priv *priv = dev->data->dev_private;
-       enum mlx5_rxq_type rxq_obj_type;
-       bool lro = true;
+       bool is_hairpin;
+       bool lro = false;
        uint32_t i;
 
        /* NULL queues designate drop queue. */
-       if (ind_tbl->queues != NULL) {
-               struct mlx5_rxq_ctrl *rxq_ctrl =
-                               mlx5_rxq_ctrl_get(dev, ind_tbl->queues[0]);
-               rxq_obj_type = rxq_ctrl != NULL ? rxq_ctrl->type :
-                                                 MLX5_RXQ_TYPE_STANDARD;
-
+       if (ind_tbl->queues == NULL) {
+               is_hairpin = priv->drop_queue.rxq->ctrl->is_hairpin;
+       } else if (mlx5_is_external_rxq(dev, ind_tbl->queues[0])) {
+               /* External RxQ supports neither Hairpin nor LRO. */
+               is_hairpin = false;
+       } else {
+               is_hairpin = mlx5_rxq_is_hairpin(dev, ind_tbl->queues[0]);
+               lro = true;
                /* Enable TIR LRO only if all the queues were configured for. */
                for (i = 0; i < ind_tbl->queues_n; ++i) {
                        struct mlx5_rxq_data *rxq_i =
@@ -727,8 +737,6 @@ mlx5_devx_tir_attr_set(struct rte_eth_dev *dev, const uint8_t *rss_key,
                                break;
                        }
                }
-       } else {
-               rxq_obj_type = priv->drop_queue.rxq->ctrl->type;
        }
        memset(tir_attr, 0, sizeof(*tir_attr));
        tir_attr->disp_type = MLX5_TIRC_DISP_TYPE_INDIRECT;
@@ -759,7 +767,7 @@ mlx5_devx_tir_attr_set(struct rte_eth_dev *dev, const uint8_t *rss_key,
                        (!!(hash_fields & MLX5_L4_DST_IBV_RX_HASH)) <<
                         MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT;
        }
-       if (rxq_obj_type == MLX5_RXQ_TYPE_HAIRPIN)
+       if (is_hairpin)
                tir_attr->transport_domain = priv->sh->td->id;
        else
                tir_attr->transport_domain = priv->sh->tdn;
@@ -768,6 +776,7 @@ mlx5_devx_tir_attr_set(struct rte_eth_dev *dev, const uint8_t *rss_key,
        if (dev->data->dev_conf.lpbk_mode)
                tir_attr->self_lb_block = MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
        if (lro) {
+               MLX5_ASSERT(priv->sh->dev_cap.lro_supported);
                tir_attr->lro_timeout_period_usecs = priv->config.lro_timeout;
                tir_attr->lro_max_msg_sz = priv->max_lro_msg_size;
                tir_attr->lro_enable_mask =
@@ -807,6 +816,14 @@ mlx5_devx_hrxq_new(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq,
                goto error;
        }
 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
+       if (hrxq->hws_flags) {
+               hrxq->action = mlx5dr_action_create_dest_tir
+                       (priv->dr_ctx,
+                        (struct mlx5dr_devx_obj *)hrxq->tir, hrxq->hws_flags);
+               if (!hrxq->action)
+                       goto error;
+               return 0;
+       }
        if (mlx5_flow_os_create_flow_action_dest_devx_tir(hrxq->tir,
                                                          &hrxq->action)) {
                rte_errno = errno;
@@ -931,8 +948,10 @@ mlx5_rxq_devx_obj_drop_create(struct rte_eth_dev *dev)
                rte_errno = ENOMEM;
                goto error;
        }
+       /* set the CPU socket ID where the rxq_ctrl was allocated */
+       rxq_ctrl->socket = socket_id;
        rxq_obj->rxq_ctrl = rxq_ctrl;
-       rxq_ctrl->type = MLX5_RXQ_TYPE_STANDARD;
+       rxq_ctrl->is_hairpin = false;
        rxq_ctrl->sh = priv->sh;
        rxq_ctrl->obj = rxq_obj;
        rxq->ctrl = rxq_ctrl;
@@ -1042,6 +1061,8 @@ mlx5_devx_drop_action_create(struct rte_eth_dev *dev)
                DRV_LOG(ERR, "Cannot create drop RX queue");
                return ret;
        }
+       if (priv->sh->config.dv_flow_en == 2)
+               return 0;
        /* hrxq->ind_table queues are NULL, drop RX queue ID will be used */
        ret = mlx5_devx_ind_table_new(dev, 0, hrxq->ind_table);
        if (ret != 0) {
@@ -1232,7 +1253,7 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
        struct mlx5_txq_ctrl *txq_ctrl =
                        container_of(txq_data, struct mlx5_txq_ctrl, txq);
 
-       if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
+       if (txq_ctrl->is_hairpin)
                return mlx5_txq_obj_hairpin_new(dev, idx);
 #if !defined(HAVE_MLX5DV_DEVX_UAR_OFFSET) && defined(HAVE_INFINIBAND_VERBS_H)
        DRV_LOG(ERR, "Port %u Tx queue %u cannot create with DevX, no UAR.",
@@ -1326,8 +1347,10 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
        txq_data->qp_db = &txq_obj->sq_obj.db_rec[MLX5_SND_DBR];
        *txq_data->qp_db = 0;
        txq_data->qp_num_8s = txq_obj->sq_obj.sq->id << 8;
-       txq_data->db_heu = sh->cdev->config.dbnc == MLX5_TXDB_HEURISTIC;
+       txq_data->db_heu = sh->cdev->config.dbnc == MLX5_SQ_DB_HEURISTIC;
        txq_data->db_nc = sh->tx_uar.dbnc;
+       txq_data->wait_on_time = !!(!sh->config.tx_pp &&
+                                   sh->cdev->config.hca_attr.wait_on_time);
        /* Change Send Queue state to Ready-to-Send. */
        ret = mlx5_txq_devx_modify(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
        if (ret) {
@@ -1369,7 +1392,7 @@ void
 mlx5_txq_devx_obj_release(struct mlx5_txq_obj *txq_obj)
 {
        MLX5_ASSERT(txq_obj);
-       if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
+       if (txq_obj->txq_ctrl->is_hairpin) {
                if (txq_obj->tis)
                        claim_zero(mlx5_devx_cmd_destroy(txq_obj->tis));
 #if defined(HAVE_MLX5DV_DEVX_UAR_OFFSET) || !defined(HAVE_INFINIBAND_VERBS_H)