default:
break;
}
+ if (rxq->ctrl->is_hairpin)
+ return mlx5_devx_cmd_modify_rq(rxq->ctrl->obj->rq, &rq_attr);
return mlx5_devx_cmd_modify_rq(rxq->devx_rq.rq, &rq_attr);
}
static void
mlx5_rxq_devx_obj_release(struct mlx5_rxq_priv *rxq)
{
- struct mlx5_rxq_ctrl *rxq_ctrl = rxq->ctrl;
- struct mlx5_rxq_obj *rxq_obj = rxq_ctrl->obj;
+ struct mlx5_rxq_obj *rxq_obj = rxq->ctrl->obj;
- MLX5_ASSERT(rxq != NULL);
- MLX5_ASSERT(rxq_ctrl != NULL);
- if (rxq_obj->rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN) {
- MLX5_ASSERT(rxq_obj->rq);
+ if (rxq_obj == NULL)
+ return;
+ if (rxq_obj->rxq_ctrl->is_hairpin) {
+ if (rxq_obj->rq == NULL)
+ return;
mlx5_devx_modify_rq(rxq, MLX5_RXQ_MOD_RDY2RST);
claim_zero(mlx5_devx_cmd_destroy(rxq_obj->rq));
} else {
+ if (rxq->devx_rq.rq == NULL)
+ return;
mlx5_devx_rq_destroy(&rxq->devx_rq);
- memset(&rxq->devx_rq, 0, sizeof(rxq->devx_rq));
+ if (rxq->devx_rq.rmp != NULL && rxq->devx_rq.rmp->ref_cnt > 0)
+ return;
mlx5_devx_cq_destroy(&rxq_obj->cq_obj);
memset(&rxq_obj->cq_obj, 0, sizeof(rxq_obj->cq_obj));
if (rxq_obj->devx_channel) {
rxq_obj->devx_channel = NULL;
}
}
+ rxq->ctrl->started = false;
}
/**
* 512*2^single_wqe_log_num_of_strides.
*/
rq_attr.wq_attr.single_wqe_log_num_of_strides =
- rxq_data->strd_num_n -
+ rxq_data->log_strd_num -
MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES;
/* Stride size = (2^single_stride_log_num_of_bytes)*64B. */
rq_attr.wq_attr.single_stride_log_num_of_bytes =
- rxq_data->strd_sz_n -
+ rxq_data->log_strd_sz -
MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES;
wqe_size = sizeof(struct mlx5_wqe_mprq);
} else {
MLX5_WQ_END_PAD_MODE_NONE;
rq_attr.wq_attr.pd = cdev->pdn;
rq_attr.counter_set_id = priv->counter_set_id;
+ rq_attr.delay_drop_en = rxq_data->delay_drop;
+ rq_attr.user_index = rte_cpu_to_be_16(priv->dev_data->port_id);
+ if (rxq_data->shared) /* Create RMP based RQ. */
+ rxq->devx_rq.rmp = &rxq_ctrl->obj->devx_rmp;
/* Create RQ using DevX API. */
return mlx5_devx_rq_create(cdev->ctx, &rxq->devx_rq, wqe_size,
log_desc_n, &rq_attr, rxq_ctrl->socket);
uint16_t event_nums[1] = { 0 };
int ret = 0;
+ if (rxq_ctrl->started)
+ return 0;
if (priv->config.cqe_comp && !rxq_data->hw_timestamp &&
!rxq_data->lro) {
cq_attr.cqe_comp_en = 1u;
"Port %u Rx CQE compression is disabled for LRO.",
port_id);
}
- cq_attr.uar_page_id = mlx5_os_get_devx_uar_page_id(sh->devx_rx_uar);
+ cq_attr.uar_page_id = mlx5_os_get_devx_uar_page_id(sh->rx_uar.obj);
log_cqe_n = log2above(cqe_n);
/* Create CQ using DevX API. */
ret = mlx5_devx_cq_create(sh->cdev->ctx, &rxq_ctrl->obj->cq_obj,
rxq_data->cqes = (volatile struct mlx5_cqe (*)[])
(uintptr_t)cq_obj->cqes;
rxq_data->cq_db = cq_obj->db_rec;
- rxq_data->cq_uar = mlx5_os_get_devx_uar_base_addr(sh->devx_rx_uar);
+ rxq_data->uar_data = sh->rx_uar.cq_db;
rxq_data->cqe_n = log_cqe_n;
rxq_data->cqn = cq_obj->cq->id;
+ rxq_data->cq_ci = 0;
if (rxq_ctrl->obj->devx_channel) {
ret = mlx5_os_devx_subscribe_devx_event
(rxq_ctrl->obj->devx_channel,
MLX5_ASSERT(rxq != NULL && rxq->ctrl != NULL && tmpl != NULL);
tmpl->rxq_ctrl = rxq_ctrl;
attr.hairpin = 1;
- max_wq_data = priv->config.hca_attr.log_max_hairpin_wq_data_sz;
+ max_wq_data =
+ priv->sh->cdev->config.hca_attr.log_max_hairpin_wq_data_sz;
/* Jumbo frames > 9KB should be supported, and more packets. */
if (priv->config.log_hp_size != (uint32_t)MLX5_ARG_UNSET) {
if (priv->config.log_hp_size > max_wq_data) {
attr.wq_attr.log_hairpin_data_sz -
MLX5_HAIRPIN_QUEUE_STRIDE;
attr.counter_set_id = priv->counter_set_id;
+ rxq_ctrl->rxq.delay_drop = priv->config.hp_delay_drop;
+ attr.delay_drop_en = priv->config.hp_delay_drop;
tmpl->rq = mlx5_devx_cmd_create_rq(priv->sh->cdev->ctx, &attr,
rxq_ctrl->socket);
if (!tmpl->rq) {
MLX5_ASSERT(rxq_data);
MLX5_ASSERT(tmpl);
- if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
+ if (rxq_ctrl->is_hairpin)
return mlx5_rxq_obj_hairpin_new(rxq);
tmpl->rxq_ctrl = rxq_ctrl;
- if (rxq_ctrl->irq) {
+ if (rxq_ctrl->irq && !rxq_ctrl->started) {
int devx_ev_flag =
MLX5DV_DEVX_CREATE_EVENT_CHANNEL_FLAGS_OMIT_EV_DATA;
DRV_LOG(ERR, "Failed to create CQ.");
goto error;
}
+ rxq_data->delay_drop = priv->config.std_delay_drop;
/* Create RQ using DevX API. */
ret = mlx5_rxq_create_devx_rq_resources(rxq);
if (ret) {
ret = mlx5_devx_modify_rq(rxq, MLX5_RXQ_MOD_RST2RDY);
if (ret)
goto error;
- rxq_data->wqes = (void *)(uintptr_t)rxq->devx_rq.wq.umem_buf;
- rxq_data->rq_db = (uint32_t *)(uintptr_t)rxq->devx_rq.wq.db_rec;
- mlx5_rxq_initialize(rxq_data);
+ if (!rxq_data->shared) {
+ rxq_data->wqes = (void *)(uintptr_t)rxq->devx_rq.wq.umem_buf;
+ rxq_data->rq_db = (uint32_t *)(uintptr_t)rxq->devx_rq.wq.db_rec;
+ } else if (!rxq_ctrl->started) {
+ rxq_data->wqes = (void *)(uintptr_t)tmpl->devx_rmp.wq.umem_buf;
+ rxq_data->rq_db =
+ (uint32_t *)(uintptr_t)tmpl->devx_rmp.wq.db_rec;
+ }
+ if (!rxq_ctrl->started) {
+ mlx5_rxq_initialize(rxq_data);
+ rxq_ctrl->wqn = rxq->devx_rq.rq->id;
+ }
priv->dev_data->rx_queue_state[rxq->idx] = RTE_ETH_QUEUE_STATE_STARTED;
- rxq_ctrl->wqn = rxq->devx_rq.rq->id;
return 0;
error:
ret = rte_errno; /* Save rte_errno before cleanup. */
rte_errno = ENOMEM;
return NULL;
}
- rqt_attr->rqt_max_size = priv->config.ind_table_max_size;
+ rqt_attr->rqt_max_size = priv->sh->dev_cap.ind_table_max_size;
rqt_attr->rqt_actual_size = rqt_n;
if (queues == NULL) {
for (i = 0; i < rqt_n; i++)
return rqt_attr;
}
for (i = 0; i != queues_n; ++i) {
- struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, queues[i]);
+ if (mlx5_is_external_rxq(dev, queues[i])) {
+ struct mlx5_external_rxq *ext_rxq =
+ mlx5_ext_rxq_get(dev, queues[i]);
- MLX5_ASSERT(rxq != NULL);
- rqt_attr->rq_list[i] = rxq->devx_rq.rq->id;
+ rqt_attr->rq_list[i] = ext_rxq->hw_id;
+ } else {
+ struct mlx5_rxq_priv *rxq =
+ mlx5_rxq_get(dev, queues[i]);
+
+ MLX5_ASSERT(rxq != NULL);
+ if (rxq->ctrl->is_hairpin)
+ rqt_attr->rq_list[i] = rxq->ctrl->obj->rq->id;
+ else
+ rqt_attr->rq_list[i] = rxq->devx_rq.rq->id;
+ }
}
MLX5_ASSERT(i > 0);
for (j = 0; i != rqt_n; ++j, ++i)
int tunnel, struct mlx5_devx_tir_attr *tir_attr)
{
struct mlx5_priv *priv = dev->data->dev_private;
- enum mlx5_rxq_type rxq_obj_type;
- bool lro = true;
+ bool is_hairpin;
+ bool lro = false;
uint32_t i;
/* NULL queues designate drop queue. */
- if (ind_tbl->queues != NULL) {
- struct mlx5_rxq_ctrl *rxq_ctrl =
- mlx5_rxq_ctrl_get(dev, ind_tbl->queues[0]);
- rxq_obj_type = rxq_ctrl != NULL ? rxq_ctrl->type :
- MLX5_RXQ_TYPE_STANDARD;
-
+ if (ind_tbl->queues == NULL) {
+ is_hairpin = priv->drop_queue.rxq->ctrl->is_hairpin;
+ } else if (mlx5_is_external_rxq(dev, ind_tbl->queues[0])) {
+ /* External RxQ supports neither Hairpin nor LRO. */
+ is_hairpin = false;
+ } else {
+ is_hairpin = mlx5_rxq_is_hairpin(dev, ind_tbl->queues[0]);
+ lro = true;
/* Enable TIR LRO only if all the queues were configured for. */
for (i = 0; i < ind_tbl->queues_n; ++i) {
struct mlx5_rxq_data *rxq_i =
break;
}
}
- } else {
- rxq_obj_type = priv->drop_queue.rxq->ctrl->type;
}
memset(tir_attr, 0, sizeof(*tir_attr));
tir_attr->disp_type = MLX5_TIRC_DISP_TYPE_INDIRECT;
(!!(hash_fields & MLX5_L4_SRC_IBV_RX_HASH)) <<
MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT |
(!!(hash_fields & MLX5_L4_DST_IBV_RX_HASH)) <<
- MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT;
+ MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT |
+ (!!(hash_fields & IBV_RX_HASH_IPSEC_SPI)) <<
+ MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI;
}
- if (rxq_obj_type == MLX5_RXQ_TYPE_HAIRPIN)
+ if (is_hairpin)
tir_attr->transport_domain = priv->sh->td->id;
else
tir_attr->transport_domain = priv->sh->tdn;
memcpy(tir_attr->rx_hash_toeplitz_key, rss_key, MLX5_RSS_HASH_KEY_LEN);
tir_attr->indirect_table = ind_tbl->rqt->id;
if (dev->data->dev_conf.lpbk_mode)
- tir_attr->self_lb_block =
- MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
+ tir_attr->self_lb_block = MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
if (lro) {
- tir_attr->lro_timeout_period_usecs = priv->config.lro.timeout;
+ MLX5_ASSERT(priv->sh->dev_cap.lro_supported);
+ tir_attr->lro_timeout_period_usecs = priv->config.lro_timeout;
tir_attr->lro_max_msg_sz = priv->max_lro_msg_size;
tir_attr->lro_enable_mask =
MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO |
goto error;
}
#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
+ if (hrxq->hws_flags) {
+ hrxq->action = mlx5dr_action_create_dest_tir
+ (priv->dr_ctx,
+ (struct mlx5dr_devx_obj *)hrxq->tir, hrxq->hws_flags);
+ if (!hrxq->action)
+ goto error;
+ return 0;
+ }
if (mlx5_flow_os_create_flow_action_dest_devx_tir(hrxq->tir,
&hrxq->action)) {
rte_errno = errno;
rte_errno = ENOMEM;
goto error;
}
+ /* set the CPU socket ID where the rxq_ctrl was allocated */
+ rxq_ctrl->socket = socket_id;
rxq_obj->rxq_ctrl = rxq_ctrl;
- rxq_ctrl->type = MLX5_RXQ_TYPE_STANDARD;
+ rxq_ctrl->is_hairpin = false;
rxq_ctrl->sh = priv->sh;
rxq_ctrl->obj = rxq_obj;
rxq->ctrl = rxq_ctrl;
dev->data->port_id);
goto error;
}
+ rxq_ctrl->rxq.delay_drop = 0;
/* Create RQ using DevX API. */
ret = mlx5_rxq_create_devx_rq_resources(rxq);
if (ret != 0) {
DRV_LOG(ERR, "Cannot create drop RX queue");
return ret;
}
+ if (priv->sh->config.dv_flow_en == 2)
+ return 0;
/* hrxq->ind_table queues are NULL, drop RX queue ID will be used */
ret = mlx5_devx_ind_table_new(dev, 0, hrxq->ind_table);
if (ret != 0) {
tmpl->txq_ctrl = txq_ctrl;
attr.hairpin = 1;
attr.tis_lst_sz = 1;
- max_wq_data = priv->config.hca_attr.log_max_hairpin_wq_data_sz;
+ max_wq_data =
+ priv->sh->cdev->config.hca_attr.log_max_hairpin_wq_data_sz;
/* Jumbo frames > 9KB should be supported, and more packets. */
if (priv->config.log_hp_size != (uint32_t)MLX5_ARG_UNSET) {
if (priv->config.log_hp_size > max_wq_data) {
{
struct mlx5_priv *priv = dev->data->dev_private;
struct mlx5_common_device *cdev = priv->sh->cdev;
+ struct mlx5_uar *uar = &priv->sh->tx_uar;
struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
struct mlx5_txq_ctrl *txq_ctrl =
container_of(txq_data, struct mlx5_txq_ctrl, txq);
struct mlx5_devx_create_sq_attr sq_attr = {
.flush_in_error_en = 1,
.allow_multi_pkt_send_wqe = !!priv->config.mps,
- .min_wqe_inline_mode = priv->config.hca_attr.vport_inline_mode,
- .allow_swp = !!priv->config.swp,
+ .min_wqe_inline_mode = cdev->config.hca_attr.vport_inline_mode,
+ .allow_swp = !!priv->sh->dev_cap.swp,
.cqn = txq_obj->cq_obj.cq->id,
.tis_lst_sz = 1,
.wq_attr = (struct mlx5_devx_wq_attr){
.pd = cdev->pdn,
- .uar_page =
- mlx5_os_get_devx_uar_page_id(priv->sh->tx_uar),
+ .uar_page = mlx5_os_get_devx_uar_page_id(uar->obj),
},
.ts_format =
mlx5_ts_format_conv(cdev->config.hca_attr.sq_ts_format),
struct mlx5_txq_ctrl *txq_ctrl =
container_of(txq_data, struct mlx5_txq_ctrl, txq);
- if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
+ if (txq_ctrl->is_hairpin)
return mlx5_txq_obj_hairpin_new(dev, idx);
#if !defined(HAVE_MLX5DV_DEVX_UAR_OFFSET) && defined(HAVE_INFINIBAND_VERBS_H)
DRV_LOG(ERR, "Port %u Tx queue %u cannot create with DevX, no UAR.",
rte_errno = ENOMEM;
return -rte_errno;
#else
+ struct mlx5_proc_priv *ppriv = MLX5_PROC_PRIV(PORT_ID(priv));
struct mlx5_dev_ctx_shared *sh = priv->sh;
struct mlx5_txq_obj *txq_obj = txq_ctrl->obj;
struct mlx5_devx_cq_attr cq_attr = {
- .uar_page_id = mlx5_os_get_devx_uar_page_id(sh->tx_uar),
+ .uar_page_id = mlx5_os_get_devx_uar_page_id(sh->tx_uar.obj),
};
- void *reg_addr;
uint32_t cqe_n, log_desc_n;
uint32_t wqe_n, wqe_size;
int ret = 0;
MLX5_ASSERT(txq_data);
MLX5_ASSERT(txq_obj);
+ MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
+ MLX5_ASSERT(ppriv);
txq_obj->txq_ctrl = txq_ctrl;
txq_obj->dev = dev;
cqe_n = (1UL << txq_data->elts_n) / MLX5_TX_COMP_THRESH +
wqe_size = RTE_ALIGN(wqe_size, MLX5_WQE_SIZE) / MLX5_WQE_SIZE;
/* Create Send Queue object with DevX. */
wqe_n = RTE_MIN((1UL << txq_data->elts_n) * wqe_size,
- (uint32_t)priv->sh->device_attr.max_qp_wr);
+ (uint32_t)priv->sh->dev_cap.max_qp_wr);
log_desc_n = log2above(wqe_n);
ret = mlx5_txq_create_devx_sq_resources(dev, idx, log_desc_n);
if (ret) {
txq_data->qp_db = &txq_obj->sq_obj.db_rec[MLX5_SND_DBR];
*txq_data->qp_db = 0;
txq_data->qp_num_8s = txq_obj->sq_obj.sq->id << 8;
+ txq_data->db_heu = sh->cdev->config.dbnc == MLX5_SQ_DB_HEURISTIC;
+ txq_data->db_nc = sh->tx_uar.dbnc;
+ txq_data->wait_on_time = !!(!sh->config.tx_pp &&
+ sh->cdev->config.hca_attr.wait_on_time);
/* Change Send Queue state to Ready-to-Send. */
ret = mlx5_txq_devx_modify(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
if (ret) {
if (!priv->sh->tdn)
priv->sh->tdn = priv->sh->td->id;
#endif
- MLX5_ASSERT(sh->tx_uar);
- reg_addr = mlx5_os_get_devx_uar_reg_addr(sh->tx_uar);
- MLX5_ASSERT(reg_addr);
- txq_ctrl->bf_reg = reg_addr;
txq_ctrl->uar_mmap_offset =
- mlx5_os_get_devx_uar_mmap_offset(sh->tx_uar);
- txq_uar_init(txq_ctrl);
+ mlx5_os_get_devx_uar_mmap_offset(sh->tx_uar.obj);
+ ppriv->uar_table[txq_data->idx] = sh->tx_uar.bf_db;
dev->data->tx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
return 0;
error:
mlx5_txq_devx_obj_release(struct mlx5_txq_obj *txq_obj)
{
MLX5_ASSERT(txq_obj);
- if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
+ if (txq_obj->txq_ctrl->is_hairpin) {
if (txq_obj->tis)
claim_zero(mlx5_devx_cmd_destroy(txq_obj->tis));
#if defined(HAVE_MLX5DV_DEVX_UAR_OFFSET) || !defined(HAVE_INFINIBAND_VERBS_H)