net/mlx5: add Rx and Tx tuning parameters

[dpdk.git] / drivers / net / mlx5 / mlx5_ethdev.c

diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index 8741df1..3fad199 100644 (file)
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -416,6 +416,45 @@ mlx5_dev_configure(struct rte_eth_dev *dev)
        return 0;
 }
 
+/**
+ * Sets default tuning parameters.
+ *
+ * @param dev
+ *   Pointer to Ethernet device.
+ * @param[out] info
+ *   Info structure output buffer.
+ */
+static void
+mlx5_set_default_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
+{
+       struct priv *priv = dev->data->dev_private;
+
+       /* Minimum CPU utilization. */
+       info->default_rxportconf.ring_size = 256;
+       info->default_txportconf.ring_size = 256;
+       info->default_rxportconf.burst_size = 64;
+       info->default_txportconf.burst_size = 64;
+       if (priv->link_speed_capa & ETH_LINK_SPEED_100G) {
+               info->default_rxportconf.nb_queues = 16;
+               info->default_txportconf.nb_queues = 16;
+               if (dev->data->nb_rx_queues > 2 ||
+                   dev->data->nb_tx_queues > 2) {
+                       /* Max Throughput. */
+                       info->default_rxportconf.ring_size = 2048;
+                       info->default_txportconf.ring_size = 2048;
+               }
+       } else {
+               info->default_rxportconf.nb_queues = 8;
+               info->default_txportconf.nb_queues = 8;
+               if (dev->data->nb_rx_queues > 2 ||
+                   dev->data->nb_tx_queues > 2) {
+                       /* Max Throughput. */
+                       info->default_rxportconf.ring_size = 4096;
+                       info->default_txportconf.ring_size = 4096;
+               }
+       }
+}
+
 /**
  * DPDK callback to get information about the device.
  *
@@ -458,6 +497,7 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
        info->hash_key_size = rss_hash_default_key_len;
        info->speed_capa = priv->link_speed_capa;
        info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK;
+       mlx5_set_default_params(dev, info);
 }
 
 /**
@@ -697,9 +737,9 @@ mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete)
        time_t start_time = time(NULL);
 
        do {
-               ret = mlx5_link_update_unlocked_gset(dev, &dev_link);
+               ret = mlx5_link_update_unlocked_gs(dev, &dev_link);
                if (ret)
-                       ret = mlx5_link_update_unlocked_gs(dev, &dev_link);
+                       ret = mlx5_link_update_unlocked_gset(dev, &dev_link);
                if (ret == 0)
                        break;
                /* Handle wait to complete situation. */
@@ -1090,11 +1130,14 @@ mlx5_select_tx_function(struct rte_eth_dev *dev)
        int tso = !!(tx_offloads & (DEV_TX_OFFLOAD_TCP_TSO |
                                    DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
                                    DEV_TX_OFFLOAD_GRE_TNL_TSO));
+       int swp = !!(tx_offloads & (DEV_TX_OFFLOAD_IP_TNL_TSO |
+                                   DEV_TX_OFFLOAD_UDP_TNL_TSO |
+                                   DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM));
        int vlan_insert = !!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT);
 
        assert(priv != NULL);
        /* Select appropriate TX function. */
-       if (vlan_insert || tso)
+       if (vlan_insert || tso || swp)
                return tx_pkt_burst;
        if (config->mps == MLX5_MPW_ENHANCED) {
                if (mlx5_check_vec_tx_support(dev) > 0) {