net/mlx5: support generic tunnel offloading

[dpdk.git] / drivers / net / mlx5 / mlx5_ethdev.c

diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index f5511ce..746b94f 100644 (file)
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright 2015 6WIND S.A.
- * Copyright 2015 Mellanox.
+ * Copyright 2015 Mellanox Technologies, Ltd
  */
 
 #define _GNU_SOURCE
@@ -33,6 +33,7 @@
 #include <rte_common.h>
 #include <rte_interrupts.h>
 #include <rte_malloc.h>
+#include <rte_string_fns.h>
 
 #include "mlx5.h"
 #include "mlx5_glue.h"
@@ -165,7 +166,7 @@ try_dev_id:
                        goto try_dev_id;
                dev_port_prev = dev_port;
                if (dev_port == (priv->port - 1u))
-                       snprintf(match, sizeof(match), "%s", name);
+                       strlcpy(match, name, sizeof(match));
        }
        closedir(dir);
        if (match[0] == '\0') {
@@ -176,6 +177,33 @@ try_dev_id:
        return 0;
 }
 
+/**
+ * Get the interface index from device name.
+ *
+ * @param[in] dev
+ *   Pointer to Ethernet device.
+ *
+ * @return
+ *   Interface index on success, a negative errno value otherwise and
+ *   rte_errno is set.
+ */
+int
+mlx5_ifindex(const struct rte_eth_dev *dev)
+{
+       char ifname[IF_NAMESIZE];
+       int ret;
+
+       ret = mlx5_get_ifname(dev, &ifname);
+       if (ret)
+               return ret;
+       ret = if_nametoindex(ifname);
+       if (ret == -1) {
+               rte_errno = errno;
+               return -rte_errno;
+       }
+       return ret;
+}
+
 /**
  * Perform ifreq ioctl() on associated Ethernet device.
  *
@@ -329,7 +357,8 @@ mlx5_dev_configure(struct rte_eth_dev *dev)
        if (use_app_rss_key &&
            (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len !=
             rss_hash_default_key_len)) {
-               /* MLX5 RSS only support 40bytes key. */
+               DRV_LOG(ERR, "port %u RSS key len must be %zu Bytes long",
+                       dev->data->port_id, rss_hash_default_key_len);
                rte_errno = EINVAL;
                return -rte_errno;
        }
@@ -403,7 +432,6 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
        unsigned int max;
        char ifname[IF_NAMESIZE];
 
-       info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
        /* FIXME: we should ask the device for these values. */
        info->min_rx_bufsize = 32;
        info->max_rx_pktlen = 65536;
@@ -418,7 +446,7 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
                max = 65535;
        info->max_rx_queues = max;
        info->max_tx_queues = max;
-       info->max_mac_addrs = RTE_DIM(priv->mac);
+       info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES;
        info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev);
        info->rx_offload_capa = (mlx5_get_rx_port_offloads() |
                                 info->rx_queue_offload_capa);
@@ -427,7 +455,7 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
                info->if_index = if_nametoindex(ifname);
        info->reta_size = priv->reta_idx_n ?
                priv->reta_idx_n : config->ind_table_max_size;
-       info->hash_key_size = priv->rss_conf.rss_key_len;
+       info->hash_key_size = rss_hash_default_key_len;
        info->speed_capa = priv->link_speed_capa;
        info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK;
 }
@@ -511,7 +539,7 @@ mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev,
        }
        link_speed = ethtool_cmd_speed(&edata);
        if (link_speed == -1)
-               dev_link.link_speed = 0;
+               dev_link.link_speed = ETH_SPEED_NUM_NONE;
        else
                dev_link.link_speed = link_speed;
        priv->link_speed_capa = 0;
@@ -1062,11 +1090,14 @@ mlx5_select_tx_function(struct rte_eth_dev *dev)
        int tso = !!(tx_offloads & (DEV_TX_OFFLOAD_TCP_TSO |
                                    DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
                                    DEV_TX_OFFLOAD_GRE_TNL_TSO));
+       int swp = !!(tx_offloads & (DEV_TX_OFFLOAD_IP_TNL_TSO |
+                                   DEV_TX_OFFLOAD_UDP_TNL_TSO |
+                                   DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM));
        int vlan_insert = !!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT);
 
        assert(priv != NULL);
        /* Select appropriate TX function. */
-       if (vlan_insert || tso)
+       if (vlan_insert || tso || swp)
                return tx_pkt_burst;
        if (config->mps == MLX5_MPW_ENHANCED) {
                if (mlx5_check_vec_tx_support(dev) > 0) {