#include <stdlib.h>
#include <errno.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
#include <rte_bus_pci.h>
#include <rte_mbuf.h>
#include <rte_common.h>
#include <mlx5_malloc.h>
#include "mlx5_rxtx.h"
+#include "mlx5_rx.h"
+#include "mlx5_tx.h"
#include "mlx5_autoconf.h"
/**
MLX5_ASSERT(priv);
MLX5_ASSERT(priv->if_index);
- ifindex = priv->bond_ifindex > 0 ? priv->bond_ifindex : priv->if_index;
+ if (priv->master && priv->sh->bond.ifindex > 0)
+ ifindex = priv->sh->bond.ifindex;
+ else
+ ifindex = priv->if_index;
if (!ifindex)
rte_errno = ENXIO;
return ifindex;
return -rte_errno;
}
- if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
- dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
if ((dev->data->dev_conf.txmode.offloads &
DEV_TX_OFFLOAD_SEND_ON_TIMESTAMP) &&
rte_mbuf_dyn_tx_timestamp_register(NULL, NULL) != 0) {
info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES;
info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev);
info->rx_seg_capa.max_nseg = MLX5_MAX_RXQ_NSEG;
- info->rx_seg_capa.multi_pools = 1;
- info->rx_seg_capa.offset_allowed = 1;
+ info->rx_seg_capa.multi_pools = !config->mprq.enabled;
+ info->rx_seg_capa.offset_allowed = !config->mprq.enabled;
info->rx_seg_capa.offset_align_log2 = 0;
info->rx_offload_capa = (mlx5_get_rx_port_offloads() |
info->rx_queue_offload_capa);
if (priv->representor) {
uint16_t port_id;
- if (priv->pf_bond >= 0) {
- /*
- * Switch port ID is opaque value with driver defined
- * format. Push the PF index in bonding configurations
- * in upper four bits of port ID. If we get too many
- * representors (more than 4K) or PFs (more than 15)
- * this approach must be reconsidered.
- */
- if ((info->switch_info.port_id >>
- MLX5_PORT_ID_BONDING_PF_SHIFT) ||
- priv->pf_bond > MLX5_PORT_ID_BONDING_PF_MASK) {
- DRV_LOG(ERR, "can't update switch port ID"
- " for bonding device");
- MLX5_ASSERT(false);
- return -ENODEV;
- }
- info->switch_info.port_id |=
- priv->pf_bond << MLX5_PORT_ID_BONDING_PF_SHIFT;
- }
- MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
+ MLX5_ETH_FOREACH_DEV(port_id, dev->device) {
struct mlx5_priv *opriv =
rte_eth_devices[port_id].data->dev_private;
return 0;
}
+/**
+ * Calculate representor ID from port switch info.
+ *
+ * Uint16 representor ID bits definition:
+ * pf: 2
+ * type: 2
+ * vf/sf: 12
+ *
+ * @param info
+ * Port switch info.
+ * @param hpf_type
+ * Use this type if port is HPF.
+ *
+ * @return
+ * Encoded representor ID.
+ */
+uint16_t
+mlx5_representor_id_encode(const struct mlx5_switch_info *info,
+ enum rte_eth_representor_type hpf_type)
+{
+ enum rte_eth_representor_type type = RTE_ETH_REPRESENTOR_VF;
+ uint16_t repr = info->port_name;
+
+ if (info->representor == 0)
+ return UINT16_MAX;
+ if (info->name_type == MLX5_PHYS_PORT_NAME_TYPE_PFSF)
+ type = RTE_ETH_REPRESENTOR_SF;
+ if (info->name_type == MLX5_PHYS_PORT_NAME_TYPE_PFHPF) {
+ type = hpf_type;
+ repr = UINT16_MAX;
+ }
+ return MLX5_REPRESENTOR_ID(info->pf_num, type, repr);
+}
+
+/**
+ * DPDK callback to get information about representor.
+ *
+ * Representor ID bits definition:
+ * vf/sf: 12
+ * type: 2
+ * pf: 2
+ *
+ * @param dev
+ * Pointer to Ethernet device structure.
+ * @param[out] info
+ * Nullable info structure output buffer.
+ *
+ * @return
+ * negative on error, or the number of representor ranges.
+ */
+int
+mlx5_representor_info_get(struct rte_eth_dev *dev,
+ struct rte_eth_representor_info *info)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ int n_type = 4; /* Representor types, VF, HPF@VF, SF and HPF@SF. */
+ int n_pf = 2; /* Number of PFs. */
+ int i = 0, pf;
+ int n_entries;
+
+ if (info == NULL)
+ goto out;
+
+ n_entries = n_type * n_pf;
+ if ((uint32_t)n_entries > info->nb_ranges_alloc)
+ n_entries = info->nb_ranges_alloc;
+
+ info->controller = 0;
+ info->pf = priv->pf_bond >= 0 ? priv->pf_bond : 0;
+ for (pf = 0; pf < n_pf; ++pf) {
+ /* VF range. */
+ info->ranges[i].type = RTE_ETH_REPRESENTOR_VF;
+ info->ranges[i].controller = 0;
+ info->ranges[i].pf = pf;
+ info->ranges[i].vf = 0;
+ info->ranges[i].id_base =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, 0);
+ info->ranges[i].id_end =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
+ snprintf(info->ranges[i].name,
+ sizeof(info->ranges[i].name), "pf%dvf", pf);
+ i++;
+ if (i == n_entries)
+ break;
+ /* HPF range of VF type. */
+ info->ranges[i].type = RTE_ETH_REPRESENTOR_VF;
+ info->ranges[i].controller = 0;
+ info->ranges[i].pf = pf;
+ info->ranges[i].vf = UINT16_MAX;
+ info->ranges[i].id_base =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
+ info->ranges[i].id_end =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
+ snprintf(info->ranges[i].name,
+ sizeof(info->ranges[i].name), "pf%dvf", pf);
+ i++;
+ if (i == n_entries)
+ break;
+ /* SF range. */
+ info->ranges[i].type = RTE_ETH_REPRESENTOR_SF;
+ info->ranges[i].controller = 0;
+ info->ranges[i].pf = pf;
+ info->ranges[i].vf = 0;
+ info->ranges[i].id_base =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, 0);
+ info->ranges[i].id_end =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
+ snprintf(info->ranges[i].name,
+ sizeof(info->ranges[i].name), "pf%dsf", pf);
+ i++;
+ if (i == n_entries)
+ break;
+ /* HPF range of SF type. */
+ info->ranges[i].type = RTE_ETH_REPRESENTOR_SF;
+ info->ranges[i].controller = 0;
+ info->ranges[i].pf = pf;
+ info->ranges[i].vf = UINT16_MAX;
+ info->ranges[i].id_base =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
+ info->ranges[i].id_end =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
+ snprintf(info->ranges[i].name,
+ sizeof(info->ranges[i].name), "pf%dsf", pf);
+ i++;
+ if (i == n_entries)
+ break;
+ }
+ info->nb_ranges = i;
+out:
+ return n_type * n_pf;
+}
+
/**
* Get firmware version of a device.
*
git.droids-corp.org / dpdk.git / blobdiff