/* General pattern items bits. */
#define MLX5_FLOW_ITEM_METADATA (1u << 16)
+#define MLX5_FLOW_ITEM_PORT_ID (1u << 17)
+
+/* Pattern MISC bits. */
+#define MLX5_FLOW_LAYER_ICMP (1u << 18)
+#define MLX5_FLOW_LAYER_ICMP6 (1u << 19)
+#define MLX5_FLOW_LAYER_GRE_KEY (1u << 20)
+
+#define MLX5_FLOW_LAYER_IPIP (1u << 21)
+#define MLX5_FLOW_LAYER_IPV6_ENCAP (1u << 22)
/* Outer Masks. */
#define MLX5_FLOW_LAYER_OUTER_L3 \
/* Tunnel Masks. */
#define MLX5_FLOW_LAYER_TUNNEL \
(MLX5_FLOW_LAYER_VXLAN | MLX5_FLOW_LAYER_VXLAN_GPE | \
- MLX5_FLOW_LAYER_GRE | MLX5_FLOW_LAYER_MPLS)
+ MLX5_FLOW_LAYER_GRE | MLX5_FLOW_LAYER_MPLS | \
+ MLX5_FLOW_LAYER_IPIP | MLX5_FLOW_LAYER_IPV6_ENCAP)
/* Inner Masks. */
#define MLX5_FLOW_LAYER_INNER_L3 \
#define MLX5_FLOW_ACTION_NVGRE_DECAP (1u << 25)
#define MLX5_FLOW_ACTION_RAW_ENCAP (1u << 26)
#define MLX5_FLOW_ACTION_RAW_DECAP (1u << 27)
+#define MLX5_FLOW_ACTION_INC_TCP_SEQ (1u << 28)
+#define MLX5_FLOW_ACTION_DEC_TCP_SEQ (1u << 29)
+#define MLX5_FLOW_ACTION_INC_TCP_ACK (1u << 30)
+#define MLX5_FLOW_ACTION_DEC_TCP_ACK (1u << 31)
#define MLX5_FLOW_FATE_ACTIONS \
- (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)
+ (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | \
+ MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_JUMP)
+
+#define MLX5_FLOW_FATE_ESWITCH_ACTIONS \
+ (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_PORT_ID | \
+ MLX5_FLOW_ACTION_JUMP)
#define MLX5_FLOW_ENCAP_ACTIONS (MLX5_FLOW_ACTION_VXLAN_ENCAP | \
MLX5_FLOW_ACTION_NVGRE_ENCAP | \
MLX5_FLOW_ACTION_SET_TTL | \
MLX5_FLOW_ACTION_DEC_TTL | \
MLX5_FLOW_ACTION_SET_MAC_SRC | \
- MLX5_FLOW_ACTION_SET_MAC_DST)
+ MLX5_FLOW_ACTION_SET_MAC_DST | \
+ MLX5_FLOW_ACTION_INC_TCP_SEQ | \
+ MLX5_FLOW_ACTION_DEC_TCP_SEQ | \
+ MLX5_FLOW_ACTION_INC_TCP_ACK | \
+ MLX5_FLOW_ACTION_DEC_TCP_ACK)
#ifndef IPPROTO_MPLS
#define IPPROTO_MPLS 137
enum mlx5_flow_drv_type {
MLX5_FLOW_TYPE_MIN,
MLX5_FLOW_TYPE_DV,
- MLX5_FLOW_TYPE_TCF,
MLX5_FLOW_TYPE_VERBS,
MLX5_FLOW_TYPE_MAX,
};
uint16_t crc; /**< CRC of key. */
uint16_t priority; /**< Priority of matcher. */
uint8_t egress; /**< Egress matcher. */
+ uint8_t transfer; /**< 1 if the flow is E-Switch flow. */
+ uint32_t group; /**< The matcher group. */
struct mlx5_flow_dv_match_params mask; /**< Matcher mask. */
};
LIST_ENTRY(mlx5_flow_dv_encap_decap_resource) next;
/* Pointer to next element. */
rte_atomic32_t refcnt; /**< Reference counter. */
- struct ibv_flow_action *verbs_action;
+ void *verbs_action;
/**< Verbs encap/decap action object. */
uint8_t buf[MLX5_ENCAP_MAX_LEN];
size_t size;
uint8_t reformat_type;
uint8_t ft_type;
+ uint64_t flags; /**< Flags for RDMA API. */
+};
+
+/* Tag resource structure. */
+struct mlx5_flow_dv_tag_resource {
+ LIST_ENTRY(mlx5_flow_dv_tag_resource) next;
+ /* Pointer to next element. */
+ rte_atomic32_t refcnt; /**< Reference counter. */
+ void *action;
+ /**< Verbs tag action object. */
+ uint32_t tag; /**< the tag value. */
};
/* Number of modification commands. */
uint32_t actions_num; /**< Number of modification actions. */
struct mlx5_modification_cmd actions[MLX5_MODIFY_NUM];
/**< Modification actions. */
+ uint64_t flags; /**< Flags for RDMA API. */
+};
+
+/* Jump action resource structure. */
+struct mlx5_flow_dv_jump_tbl_resource {
+ LIST_ENTRY(mlx5_flow_dv_jump_tbl_resource) next;
+ /* Pointer to next element. */
+ rte_atomic32_t refcnt; /**< Reference counter. */
+ void *action; /**< Pointer to the rdma core action. */
+ uint8_t ft_type; /**< Flow table type, Rx or Tx. */
+ struct mlx5_flow_tbl_resource *tbl; /**< The target table. */
+};
+
+/* Port ID resource structure. */
+struct mlx5_flow_dv_port_id_action_resource {
+ LIST_ENTRY(mlx5_flow_dv_port_id_action_resource) next;
+ /* Pointer to next element. */
+ rte_atomic32_t refcnt; /**< Reference counter. */
+ void *action;
+ /**< Verbs tag action object. */
+ uint32_t port_id; /**< Port ID value. */
};
/*
struct mlx5_flow_dv_modify_hdr_resource *modify_hdr;
/**< Pointer to modify header resource in cache. */
struct ibv_flow *flow; /**< Installed flow. */
+ struct mlx5_flow_dv_jump_tbl_resource *jump;
+ /**< Pointer to the jump action resource. */
+ struct mlx5_flow_dv_port_id_action_resource *port_id_action;
+ /**< Pointer to port ID action resource. */
#ifdef HAVE_IBV_FLOW_DV_SUPPORT
- struct mlx5dv_flow_action_attr actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS];
+ void *actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS];
/**< Action list. */
#endif
int actions_n; /**< number of actions. */
};
-/** Linux TC flower driver for E-Switch flow. */
-struct mlx5_flow_tcf {
- struct nlmsghdr *nlh;
- struct tcmsg *tcm;
- uint32_t *ptc_flags; /**< tc rule applied flags. */
- union { /**< Tunnel encap/decap descriptor. */
- struct flow_tcf_tunnel_hdr *tunnel;
- struct flow_tcf_vxlan_decap *vxlan_decap;
- struct flow_tcf_vxlan_encap *vxlan_encap;
- };
- uint32_t applied:1; /**< Whether rule is currently applied. */
-#ifndef NDEBUG
- uint32_t nlsize; /**< Size of NL message buffer for debug check. */
-#endif
-};
-
/* Verbs specification header. */
struct ibv_spec_header {
enum ibv_flow_spec_type type;
#ifdef HAVE_IBV_FLOW_DV_SUPPORT
struct mlx5_flow_dv dv;
#endif
- struct mlx5_flow_tcf tcf;
struct mlx5_flow_verbs verbs;
};
};
-/* Counters information. */
-struct mlx5_flow_counter {
- LIST_ENTRY(mlx5_flow_counter) next; /**< Pointer to the next counter. */
- uint32_t shared:1; /**< Share counter ID with other flow rules. */
- uint32_t ref_cnt:31; /**< Reference counter. */
- uint32_t id; /**< Counter ID. */
- union { /**< Holds the counters for the rule. */
-#if defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42)
- struct ibv_counter_set *cs;
-#elif defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
- struct ibv_counters *cs;
-#endif
- struct mlx5_devx_counter_set *dcs;
- };
- uint64_t hits; /**< Number of packets matched by the rule. */
- uint64_t bytes; /**< Number of bytes matched by the rule. */
-};
-
/* Flow structure. */
struct rte_flow {
TAILQ_ENTRY(rte_flow) next; /**< Pointer to the next flow structure. */
- enum mlx5_flow_drv_type drv_type; /**< Drvier type. */
+ enum mlx5_flow_drv_type drv_type; /**< Driver type. */
struct mlx5_flow_counter *counter; /**< Holds flow counter. */
+ struct mlx5_flow_dv_tag_resource *tag_resource;
+ /**< pointer to the tag action. */
struct rte_flow_action_rss rss;/**< RSS context. */
uint8_t key[MLX5_RSS_HASH_KEY_LEN]; /**< RSS hash key. */
uint16_t (*queue)[]; /**< Destination queues to redirect traffic to. */
uint64_t actions;
/**< Bit-fields of detected actions, see MLX5_FLOW_ACTION_*. */
struct mlx5_fdir *fdir; /**< Pointer to associated FDIR if any. */
+ uint8_t ingress; /**< 1 if the flow is ingress. */
+ uint32_t group; /**< The group index. */
+ uint8_t transfer; /**< 1 if the flow is E-Switch flow. */
};
typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev,
uint64_t action_flags,
struct rte_eth_dev *dev,
const struct rte_flow_attr *attr,
+ uint64_t item_flags,
struct rte_flow_error *error);
int mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
const struct rte_flow_attr *attributes,
uint64_t item_flags,
uint8_t target_protocol,
struct rte_flow_error *error);
+int mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
+ uint64_t item_flags,
+ const struct rte_flow_item *gre_item,
+ struct rte_flow_error *error);
int mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
uint64_t item_flags,
const struct rte_flow_item_ipv4 *acc_mask,
uint64_t item_flags,
struct rte_eth_dev *dev,
struct rte_flow_error *error);
-
-/* mlx5_flow_tcf.c */
-
-int mlx5_flow_tcf_init(struct mlx5_flow_tcf_context *ctx,
- unsigned int ifindex, struct rte_flow_error *error);
-struct mlx5_flow_tcf_context *mlx5_flow_tcf_context_create(void);
-void mlx5_flow_tcf_context_destroy(struct mlx5_flow_tcf_context *ctx);
+int mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
+ uint64_t item_flags,
+ uint8_t target_protocol,
+ struct rte_flow_error *error);
+int mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
+ uint64_t item_flags,
+ uint8_t target_protocol,
+ struct rte_flow_error *error);
#endif /* RTE_PMD_MLX5_FLOW_H_ */