static int
mlx5_flow_item_field_width(struct mlx5_priv *priv,
- enum rte_flow_field_id field)
+ enum rte_flow_field_id field, int inherit)
{
switch (field) {
case RTE_FLOW_FIELD_START:
return __builtin_popcount(priv->sh->dv_meta_mask);
case RTE_FLOW_FIELD_POINTER:
case RTE_FLOW_FIELD_VALUE:
- return 64;
+ return inherit < 0 ? 0 : inherit;
default:
MLX5_ASSERT(false);
}
static void
mlx5_flow_field_id_to_modify_info
(const struct rte_flow_action_modify_data *data,
- struct field_modify_info *info,
- uint32_t *mask, uint32_t *value,
- uint32_t width, uint32_t dst_width,
- uint32_t *shift, struct rte_eth_dev *dev,
- const struct rte_flow_attr *attr,
- struct rte_flow_error *error)
+ struct field_modify_info *info, uint32_t *mask,
+ uint32_t width, uint32_t *shift, struct rte_eth_dev *dev,
+ const struct rte_flow_attr *attr, struct rte_flow_error *error)
{
struct mlx5_priv *priv = dev->data->dev_private;
uint32_t idx = 0;
uint32_t off = 0;
- uint64_t val = 0;
+
switch (data->field) {
case RTE_FLOW_FIELD_START:
/* not supported yet */
off = data->offset > 16 ? data->offset - 16 : 0;
if (mask) {
if (data->offset < 16) {
- info[idx] = (struct field_modify_info){2, 0,
+ info[idx] = (struct field_modify_info){2, 4,
MLX5_MODI_OUT_DMAC_15_0};
if (width < 16) {
mask[idx] = rte_cpu_to_be_16(0xffff >>
break;
++idx;
}
- info[idx] = (struct field_modify_info){4, 4 * idx,
+ info[idx] = (struct field_modify_info){4, 0,
MLX5_MODI_OUT_DMAC_47_16};
mask[idx] = rte_cpu_to_be_32((0xffffffff >>
(32 - width)) << off);
} else {
if (data->offset < 16)
- info[idx++] = (struct field_modify_info){2, 0,
+ info[idx++] = (struct field_modify_info){2, 4,
MLX5_MODI_OUT_DMAC_15_0};
- info[idx] = (struct field_modify_info){4, off,
+ info[idx] = (struct field_modify_info){4, 0,
MLX5_MODI_OUT_DMAC_47_16};
}
break;
off = data->offset > 16 ? data->offset - 16 : 0;
if (mask) {
if (data->offset < 16) {
- info[idx] = (struct field_modify_info){2, 0,
+ info[idx] = (struct field_modify_info){2, 4,
MLX5_MODI_OUT_SMAC_15_0};
if (width < 16) {
mask[idx] = rte_cpu_to_be_16(0xffff >>
break;
++idx;
}
- info[idx] = (struct field_modify_info){4, 4 * idx,
+ info[idx] = (struct field_modify_info){4, 0,
MLX5_MODI_OUT_SMAC_47_16};
mask[idx] = rte_cpu_to_be_32((0xffffffff >>
(32 - width)) << off);
} else {
if (data->offset < 16)
- info[idx++] = (struct field_modify_info){2, 0,
+ info[idx++] = (struct field_modify_info){2, 4,
MLX5_MODI_OUT_SMAC_15_0};
- info[idx] = (struct field_modify_info){4, off,
+ info[idx] = (struct field_modify_info){4, 0,
MLX5_MODI_OUT_SMAC_47_16};
}
break;
case RTE_FLOW_FIELD_IPV6_SRC:
if (mask) {
if (data->offset < 32) {
- info[idx] = (struct field_modify_info){4,
- 4 * idx,
+ info[idx] = (struct field_modify_info){4, 12,
MLX5_MODI_OUT_SIPV6_31_0};
if (width < 32) {
mask[idx] =
++idx;
}
if (data->offset < 64) {
- info[idx] = (struct field_modify_info){4,
- 4 * idx,
+ info[idx] = (struct field_modify_info){4, 8,
MLX5_MODI_OUT_SIPV6_63_32};
if (width < 32) {
mask[idx] =
++idx;
}
if (data->offset < 96) {
- info[idx] = (struct field_modify_info){4,
- 4 * idx,
+ info[idx] = (struct field_modify_info){4, 4,
MLX5_MODI_OUT_SIPV6_95_64};
if (width < 32) {
mask[idx] =
break;
++idx;
}
- info[idx] = (struct field_modify_info){4, 4 * idx,
+ info[idx] = (struct field_modify_info){4, 0,
MLX5_MODI_OUT_SIPV6_127_96};
mask[idx] = rte_cpu_to_be_32(0xffffffff >>
(32 - width));
} else {
if (data->offset < 32)
- info[idx++] = (struct field_modify_info){4, 0,
+ info[idx++] = (struct field_modify_info){4, 12,
MLX5_MODI_OUT_SIPV6_31_0};
if (data->offset < 64)
- info[idx++] = (struct field_modify_info){4, 0,
+ info[idx++] = (struct field_modify_info){4, 8,
MLX5_MODI_OUT_SIPV6_63_32};
if (data->offset < 96)
- info[idx++] = (struct field_modify_info){4, 0,
+ info[idx++] = (struct field_modify_info){4, 4,
MLX5_MODI_OUT_SIPV6_95_64};
if (data->offset < 128)
info[idx++] = (struct field_modify_info){4, 0,
case RTE_FLOW_FIELD_IPV6_DST:
if (mask) {
if (data->offset < 32) {
- info[idx] = (struct field_modify_info){4,
- 4 * idx,
+ info[idx] = (struct field_modify_info){4, 12,
MLX5_MODI_OUT_DIPV6_31_0};
if (width < 32) {
mask[idx] =
++idx;
}
if (data->offset < 64) {
- info[idx] = (struct field_modify_info){4,
- 4 * idx,
+ info[idx] = (struct field_modify_info){4, 8,
MLX5_MODI_OUT_DIPV6_63_32};
if (width < 32) {
mask[idx] =
++idx;
}
if (data->offset < 96) {
- info[idx] = (struct field_modify_info){4,
- 4 * idx,
+ info[idx] = (struct field_modify_info){4, 4,
MLX5_MODI_OUT_DIPV6_95_64};
if (width < 32) {
mask[idx] =
break;
++idx;
}
- info[idx] = (struct field_modify_info){4, 4 * idx,
+ info[idx] = (struct field_modify_info){4, 0,
MLX5_MODI_OUT_DIPV6_127_96};
mask[idx] = rte_cpu_to_be_32(0xffffffff >>
(32 - width));
} else {
if (data->offset < 32)
- info[idx++] = (struct field_modify_info){4, 0,
+ info[idx++] = (struct field_modify_info){4, 12,
MLX5_MODI_OUT_DIPV6_31_0};
if (data->offset < 64)
- info[idx++] = (struct field_modify_info){4, 0,
+ info[idx++] = (struct field_modify_info){4, 8,
MLX5_MODI_OUT_DIPV6_63_32};
if (data->offset < 96)
- info[idx++] = (struct field_modify_info){4, 0,
+ info[idx++] = (struct field_modify_info){4, 4,
MLX5_MODI_OUT_DIPV6_95_64};
if (data->offset < 128)
info[idx++] = (struct field_modify_info){4, 0,
break;
case RTE_FLOW_FIELD_POINTER:
case RTE_FLOW_FIELD_VALUE:
- if (data->field == RTE_FLOW_FIELD_POINTER)
- memcpy(&val, (void *)(uintptr_t)data->value,
- sizeof(uint64_t));
- else
- val = data->value;
- for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
- if (mask[idx]) {
- if (dst_width == 48) {
- /*special case for MAC addresses */
- value[idx] = rte_cpu_to_be_16(val);
- val >>= 16;
- dst_width -= 16;
- } else if (dst_width > 16) {
- value[idx] = rte_cpu_to_be_32(val);
- val >>= 32;
- } else if (dst_width > 8) {
- value[idx] = rte_cpu_to_be_16(val);
- val >>= 16;
- } else {
- value[idx] = (uint8_t)val;
- val >>= 8;
- }
- if (*shift)
- value[idx] <<= *shift;
- if (!val)
- break;
- }
- }
- break;
default:
MLX5_ASSERT(false);
break;
const struct rte_flow_attr *attr,
struct rte_flow_error *error)
{
- struct mlx5_priv *priv = dev->data->dev_private;
const struct rte_flow_action_modify_field *conf =
(const struct rte_flow_action_modify_field *)(action->conf);
- struct rte_flow_item item;
+ struct rte_flow_item item = {
+ .spec = NULL,
+ .mask = NULL
+ };
struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
{0, 0, 0} };
struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
{0, 0, 0} };
uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
- uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
uint32_t type;
uint32_t shift = 0;
- uint32_t dst_width = mlx5_flow_item_field_width(priv, conf->dst.field);
if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
- conf->src.field == RTE_FLOW_FIELD_VALUE) {
+ conf->src.field == RTE_FLOW_FIELD_VALUE) {
type = MLX5_MODIFICATION_TYPE_SET;
/** For SET fill the destination field (field) first. */
mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
- value, conf->width, dst_width,
- &shift, dev, attr, error);
- /** Then copy immediate value from source as per mask. */
- mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
- value, conf->width, dst_width,
- &shift, dev, attr, error);
- item.spec = &value;
+ conf->width, &shift, dev,
+ attr, error);
+ item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
+ (void *)(uintptr_t)conf->src.pvalue :
+ (void *)(uintptr_t)&conf->src.value;
} else {
type = MLX5_MODIFICATION_TYPE_COPY;
/** For COPY fill the destination field (dcopy) without mask. */
mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
- value, conf->width, dst_width,
- &shift, dev, attr, error);
+ conf->width, &shift, dev,
+ attr, error);
/** Then construct the source field (field) with mask. */
mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
- value, conf->width, dst_width,
- &shift, dev, attr, error);
+ conf->width, &shift,
+ dev, attr, error);
}
item.mask = &mask;
return flow_dv_convert_modify_action(&item,
{
struct mlx5_priv *priv = dev->data->dev_private;
- if (!priv->config.devx)
+ if (!priv->sh->devx)
goto notsup_err;
if (action_flags & MLX5_FLOW_ACTION_COUNT)
return rte_flow_error_set(error, EINVAL,
}
*resource = *ctx_resource;
resource->idx = idx;
- ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->ctx, domain,
- resource,
+ ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
+ domain, resource,
&resource->action);
if (ret) {
mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
const struct rte_flow_action_modify_field *action_modify_field =
action->conf;
uint32_t dst_width = mlx5_flow_item_field_width(priv,
- action_modify_field->dst.field);
+ action_modify_field->dst.field, -1);
uint32_t src_width = mlx5_flow_item_field_width(priv,
- action_modify_field->src.field);
+ action_modify_field->src.field, dst_width);
ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
if (ret)
}
/*
- * Validate the port_id action.
+ * Validate action PORT_ID / REPRESENTED_PORT.
*
* @param[in] dev
* Pointer to rte_eth_dev structure.
* @param[in] action_flags
* Bit-fields that holds the actions detected until now.
* @param[in] action
- * Port_id RTE action structure.
+ * PORT_ID / REPRESENTED_PORT action structure.
* @param[in] attr
* Attributes of flow that includes this action.
* @param[out] error
struct rte_flow_error *error)
{
const struct rte_flow_action_port_id *port_id;
+ const struct rte_flow_action_ethdev *ethdev;
struct mlx5_priv *act_priv;
struct mlx5_priv *dev_priv;
uint16_t port;
return rte_flow_error_set(error, ENOTSUP,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL,
- "port id action is valid in transfer"
+ "port action is valid in transfer"
" mode only");
if (!action || !action->conf)
return rte_flow_error_set(error, ENOTSUP,
RTE_FLOW_ERROR_TYPE_ACTION_CONF,
NULL,
- "port id action parameters must be"
+ "port action parameters must be"
" specified");
if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
MLX5_FLOW_FATE_ESWITCH_ACTIONS))
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL,
"failed to obtain E-Switch info");
- port_id = action->conf;
- port = port_id->original ? dev->data->port_id : port_id->id;
+ switch (action->type) {
+ case RTE_FLOW_ACTION_TYPE_PORT_ID:
+ port_id = action->conf;
+ port = port_id->original ? dev->data->port_id : port_id->id;
+ break;
+ case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
+ ethdev = action->conf;
+ port = ethdev->port_id;
+ break;
+ default:
+ MLX5_ASSERT(false);
+ return rte_flow_error_set
+ (error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ACTION, action,
+ "unknown E-Switch action");
+ }
act_priv = mlx5_port_to_eswitch_info(port, false);
if (!act_priv)
return rte_flow_error_set
(error, rte_errno,
- RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
+ RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
"failed to obtain E-Switch port id for port");
if (act_priv->domain_id != dev_priv->domain_id)
return rte_flow_error_set
struct mlx5_priv *priv = dev->data->dev_private;
const struct rte_flow_action_age *age = action->conf;
- if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
+ if (!priv->sh->devx || (priv->sh->cmng.counter_fallback &&
!priv->sh->aso_age_mng))
return rte_flow_error_set(error, ENOTSUP,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
else
ns = sh->rx_domain;
ret = mlx5_flow_os_create_flow_action_modify_header
- (sh->ctx, ns, entry,
+ (sh->cdev->ctx, ns, entry,
data_len, &entry->action);
if (ret) {
mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
return rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ACTION, action,
"ratio value starts from 1");
- if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
+ if (!priv->sh->devx || (sample->ratio > 0 && !priv->sampler_en))
return rte_flow_error_set(error, ENOTSUP,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL,
++actions_n;
break;
case RTE_FLOW_ACTION_TYPE_PORT_ID:
+ case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
ret = flow_dv_validate_action_port_id(dev,
sub_action_flags,
act,
if (fallback) {
/* bulk_bitmap must be 0 for single counter allocation. */
- dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
+ dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
if (!dcs)
return NULL;
pool = flow_dv_find_pool_by_id(cmng, dcs->id);
*cnt_free = cnt;
return pool;
}
- dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
+ dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
if (!dcs) {
rte_errno = ENODATA;
return NULL;
age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
uint32_t cnt_idx;
- if (!priv->config.devx) {
+ if (!priv->sh->devx) {
rte_errno = ENOTSUP;
return 0;
}
* NULL otherwise and rte_errno is set.
*/
static struct mlx5_aso_mtr_pool *
-flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
- struct mlx5_aso_mtr **mtr_free)
+flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
{
struct mlx5_priv *priv = dev->data->dev_private;
- struct mlx5_aso_mtr_pools_mng *pools_mng =
- &priv->sh->mtrmng->pools_mng;
+ struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
struct mlx5_aso_mtr_pool *pool = NULL;
struct mlx5_devx_obj *dcs = NULL;
uint32_t i;
uint32_t log_obj_size;
log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
- dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
- priv->sh->pdn, log_obj_size);
+ dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
+ priv->sh->cdev->pdn,
+ log_obj_size);
if (!dcs) {
rte_errno = ENODATA;
return NULL;
pools_mng->n_valid++;
for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
pool->mtrs[i].offset = i;
- LIST_INSERT_HEAD(&pools_mng->meters,
- &pool->mtrs[i], next);
+ LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
}
pool->mtrs[0].offset = 0;
*mtr_free = &pool->mtrs[0];
struct mlx5_aso_mtr_pool *pool;
uint32_t mtr_idx = 0;
- if (!priv->config.devx) {
+ if (!priv->sh->devx) {
rte_errno = ENOTSUP;
return 0;
}
case RTE_FLOW_ACTION_TYPE_VOID:
break;
case RTE_FLOW_ACTION_TYPE_PORT_ID:
+ case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
ret = flow_dv_validate_action_port_id(dev,
action_flags,
actions,
}
} else {
/* Create a GENEVE TLV object and resource. */
- obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
+ obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
geneve_opt_v->option_class,
geneve_opt_v->option_type,
geneve_opt_v->option_len);
dv_attr.priority = ref->priority;
if (tbl->is_egress)
dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
- ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
+ ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
+ tbl->tbl.obj,
&resource->matcher_object);
if (ret) {
mlx5_free(resource);
}
/**
- * Translate port ID action to vport.
+ * Translate action PORT_ID / REPRESENTED_PORT to vport.
*
* @param[in] dev
* Pointer to rte_eth_dev structure.
* @param[in] action
- * Pointer to the port ID action.
+ * Pointer to action PORT_ID / REPRESENTED_PORT.
* @param[out] dst_port_id
* The target port ID.
* @param[out] error
{
uint32_t port;
struct mlx5_priv *priv;
- const struct rte_flow_action_port_id *conf =
- (const struct rte_flow_action_port_id *)action->conf;
- port = conf->original ? dev->data->port_id : conf->id;
+ switch (action->type) {
+ case RTE_FLOW_ACTION_TYPE_PORT_ID: {
+ const struct rte_flow_action_port_id *conf;
+
+ conf = (const struct rte_flow_action_port_id *)action->conf;
+ port = conf->original ? dev->data->port_id : conf->id;
+ break;
+ }
+ case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
+ const struct rte_flow_action_ethdev *ethdev;
+
+ ethdev = (const struct rte_flow_action_ethdev *)action->conf;
+ port = ethdev->port_id;
+ break;
+ }
+ default:
+ MLX5_ASSERT(false);
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ACTION, action,
+ "unknown E-Switch action");
+ }
+
priv = mlx5_port_to_eswitch_info(port, false);
if (!priv)
return rte_flow_error_set(error, -rte_errno,
break;
}
case RTE_FLOW_ACTION_TYPE_PORT_ID:
+ case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
{
struct mlx5_flow_dv_port_id_action_resource
port_id_resource;
struct mlx5_devx_obj *obj = NULL;
uint32_t i;
- obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
- priv->sh->pdn);
+ obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
+ priv->sh->cdev->pdn);
if (!obj) {
rte_errno = ENODATA;
DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
uint32_t i;
uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
- obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
- priv->sh->pdn, log_obj_size);
+ obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
+ priv->sh->cdev->pdn,
+ log_obj_size);
if (!obj) {
rte_errno = ENODATA;
DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
uint32_t ct_idx;
MLX5_ASSERT(mng);
- if (!priv->config.devx) {
+ if (!priv->sh->devx) {
rte_errno = ENOTSUP;
return 0;
}
case RTE_FLOW_ACTION_TYPE_VOID:
break;
case RTE_FLOW_ACTION_TYPE_PORT_ID:
+ case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
if (flow_dv_translate_action_port_id(dev, action,
&port_id, error))
return -rte_errno;
}
break;
case RTE_FLOW_ACTION_TYPE_COUNT:
- if (!dev_conf->devx) {
+ if (!priv->sh->devx) {
return rte_flow_error_set
(error, ENOTSUP,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
break;
}
case RTE_FLOW_ACTION_TYPE_PORT_ID:
+ case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
{
struct mlx5_flow_dv_port_id_action_resource
port_id_resource;
struct mlx5_priv *priv = dev->data->dev_private;
struct rte_flow_query_count *qc = data;
- if (!priv->config.devx)
+ if (!priv->sh->devx)
return rte_flow_error_set(error, ENOTSUP,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL,
goto err;
dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
__flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
- ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
- &matcher);
+ ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
+ tbl->obj, &matcher);
if (ret)
goto err;
__flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
0, 0, 0, NULL);
if (!tbl)
goto err;
- dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
+ dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
if (!dcs)
goto err;
ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
goto err;
dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
__flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
- ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
- &matcher);
+ ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
+ tbl->obj, &matcher);
if (ret)
goto err;
__flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
uint64_t inn_pkts, inn_bytes;
int ret;
- if (!priv->config.devx)
+ if (!priv->sh->devx)
return -1;
ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
NULL, "too many actions");
switch (act->type) {
case RTE_FLOW_ACTION_TYPE_PORT_ID:
+ case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
if (!priv->config.dv_esw_en)
return -rte_mtr_error_set(error,
ENOTSUP,
"Doesn't support optional action");
}
}
- if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID)
+ if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
- else if ((action_flags[i] &
+ } else if ((action_flags[i] &
(MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
- (action_flags[i] & MLX5_FLOW_ACTION_MARK))
+ (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
/*
* Only support MLX5_XMETA_MODE_LEGACY
* so MARK action is only in ingress domain.
*/
domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
- else
+ } else {
domain_color[i] = def_domain;
+ if (action_flags[i] &&
+ !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
+ domain_color[i] &=
+ ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
+ }
if (action_flags[i] &
MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
domain_color[i] &= hierarchy_domain;