common/mlx5: share common definitions

[dpdk.git] / drivers / net / mlx5 / mlx5_rx.c

diff --git a/drivers/net/mlx5/mlx5_rx.c b/drivers/net/mlx5/mlx5_rx.c
index 6cd71a4..1a9eb35 100644 (file)
--- a/drivers/net/mlx5/mlx5_rx.c
+++ b/drivers/net/mlx5/mlx5_rx.c
@@ -240,35 +240,47 @@ mlx5_rx_burst_mode_get(struct rte_eth_dev *dev,
 /**
  * DPDK callback to get the number of used descriptors in a RX queue.
  *
- * @param dev
- *   Pointer to the device structure.
- *
- * @param rx_queue_id
- *   The Rx queue.
+ * @param rx_queue
+ *   The Rx queue pointer.
  *
  * @return
  *   The number of used rx descriptor.
  *   -EINVAL if the queue is invalid
  */
 uint32_t
-mlx5_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
+mlx5_rx_queue_count(void *rx_queue)
 {
-       struct mlx5_priv *priv = dev->data->dev_private;
-       struct mlx5_rxq_data *rxq;
+       struct mlx5_rxq_data *rxq = rx_queue;
+       struct rte_eth_dev *dev;
+
+       if (!rxq) {
+               rte_errno = EINVAL;
+               return -rte_errno;
+       }
+
+       dev = &rte_eth_devices[rxq->port_id];
 
        if (dev->rx_pkt_burst == NULL ||
            dev->rx_pkt_burst == removed_rx_burst) {
                rte_errno = ENOTSUP;
                return -rte_errno;
        }
-       rxq = (*priv->rxqs)[rx_queue_id];
-       if (!rxq) {
-               rte_errno = EINVAL;
-               return -rte_errno;
-       }
+
        return rx_queue_count(rxq);
 }
 
+#define CLB_VAL_IDX 0
+#define CLB_MSK_IDX 1
+static int
+mlx5_monitor_callback(const uint64_t value,
+               const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ])
+{
+       const uint64_t m = opaque[CLB_MSK_IDX];
+       const uint64_t v = opaque[CLB_VAL_IDX];
+
+       return (value & m) == v ? -1 : 0;
+}
+
 int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
 {
        struct mlx5_rxq_data *rxq = rx_queue;
@@ -282,8 +294,9 @@ int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
                return -rte_errno;
        }
        pmc->addr = &cqe->op_own;
-       pmc->val =  !!idx;
-       pmc->mask = MLX5_CQE_OWNER_MASK;
+       pmc->opaque[CLB_VAL_IDX] = !!idx;
+       pmc->opaque[CLB_MSK_IDX] = MLX5_CQE_OWNER_MASK;
+       pmc->fn = mlx5_monitor_callback;
        pmc->size = sizeof(uint8_t);
        return 0;
 }
@@ -740,8 +753,8 @@ rxq_cq_to_mbuf(struct mlx5_rxq_data *rxq, struct rte_mbuf *pkt,
                }
        }
        if (rxq->dynf_meta) {
-               uint32_t meta = cqe->flow_table_metadata &
-                               rxq->flow_meta_port_mask;
+               uint32_t meta = rte_be_to_cpu_32(cqe->flow_table_metadata) &
+                       rxq->flow_meta_port_mask;
 
                if (meta) {
                        pkt->ol_flags |= rxq->flow_meta_mask;