net/mlx5: prepare Tx to support scheduling

[dpdk.git] / drivers / net / mlx5 / mlx5_rxq.c

diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 7a50ec6..2681322 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -34,6 +34,7 @@
 
 #include "mlx5_defs.h"
 #include "mlx5.h"
+#include "mlx5_common_os.h"
 #include "mlx5_rxtx.h"
 #include "mlx5_utils.h"
 #include "mlx5_autoconf.h"
@@ -107,7 +108,7 @@ inline int
 mlx5_mprq_enabled(struct rte_eth_dev *dev)
 {
        struct mlx5_priv *priv = dev->data->dev_private;
-       uint16_t i;
+       uint32_t i;
        uint16_t n = 0;
        uint16_t n_ibv = 0;
 
@@ -453,19 +454,19 @@ mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
  *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
 static int
-mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc)
+mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc)
 {
        struct mlx5_priv *priv = dev->data->dev_private;
 
-       if (!rte_is_power_of_2(desc)) {
-               desc = 1 << log2above(desc);
+       if (!rte_is_power_of_2(*desc)) {
+               *desc = 1 << log2above(*desc);
                DRV_LOG(WARNING,
                        "port %u increased number of descriptors in Rx queue %u"
                        " to the next power of two (%d)",
-                       dev->data->port_id, idx, desc);
+                       dev->data->port_id, idx, *desc);
        }
        DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
-               dev->data->port_id, idx, desc);
+               dev->data->port_id, idx, *desc);
        if (idx >= priv->rxqs_n) {
                DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
                        dev->data->port_id, idx, priv->rxqs_n);
@@ -511,7 +512,7 @@ mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
                container_of(rxq, struct mlx5_rxq_ctrl, rxq);
        int res;
 
-       res = mlx5_rx_queue_pre_setup(dev, idx, desc);
+       res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
        if (res)
                return res;
        rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, mp);
@@ -552,7 +553,7 @@ mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
                container_of(rxq, struct mlx5_rxq_ctrl, rxq);
        int res;
 
-       res = mlx5_rx_queue_pre_setup(dev, idx, desc);
+       res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
        if (res)
                return res;
        if (hairpin_conf->peer_count != 1 ||
@@ -1267,7 +1268,6 @@ mlx5_rxq_obj_hairpin_new(struct rte_eth_dev *dev, uint16_t idx)
                container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
        struct mlx5_devx_create_rq_attr attr = { 0 };
        struct mlx5_rxq_obj *tmpl = NULL;
-       int ret = 0;
        uint32_t max_wq_data;
 
        MLX5_ASSERT(rxq_data);
@@ -1279,7 +1279,7 @@ mlx5_rxq_obj_hairpin_new(struct rte_eth_dev *dev, uint16_t idx)
                        "port %u Rx queue %u cannot allocate verbs resources",
                        dev->data->port_id, rxq_data->idx);
                rte_errno = ENOMEM;
-               goto error;
+               return NULL;
        }
        tmpl->type = MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN;
        tmpl->rxq_ctrl = rxq_ctrl;
@@ -1291,6 +1291,7 @@ mlx5_rxq_obj_hairpin_new(struct rte_eth_dev *dev, uint16_t idx)
                        DRV_LOG(ERR, "total data size %u power of 2 is "
                                "too large for hairpin",
                                priv->config.log_hp_size);
+                       rte_free(tmpl);
                        rte_errno = ERANGE;
                        return NULL;
                }
@@ -1310,8 +1311,9 @@ mlx5_rxq_obj_hairpin_new(struct rte_eth_dev *dev, uint16_t idx)
                DRV_LOG(ERR,
                        "port %u Rx hairpin queue %u can't create rq object",
                        dev->data->port_id, idx);
+               rte_free(tmpl);
                rte_errno = errno;
-               goto error;
+               return NULL;
        }
        DRV_LOG(DEBUG, "port %u rxq %u updated with %p", dev->data->port_id,
                idx, (void *)&tmpl);
@@ -1319,12 +1321,6 @@ mlx5_rxq_obj_hairpin_new(struct rte_eth_dev *dev, uint16_t idx)
        LIST_INSERT_HEAD(&priv->rxqsobj, tmpl, next);
        priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
        return tmpl;
-error:
-       ret = rte_errno; /* Save rte_errno before cleanup. */
-       if (tmpl->rq)
-               mlx5_devx_cmd_destroy(tmpl->rq);
-       rte_errno = ret; /* Restore rte_errno. */
-       return NULL;
 }
 
 /**
@@ -1410,19 +1406,20 @@ mlx5_rxq_obj_new(struct rte_eth_dev *dev, uint16_t idx,
                goto error;
        }
        DRV_LOG(DEBUG, "port %u device_attr.max_qp_wr is %d",
-               dev->data->port_id, priv->sh->device_attr.orig_attr.max_qp_wr);
+               dev->data->port_id, priv->sh->device_attr.max_qp_wr);
        DRV_LOG(DEBUG, "port %u device_attr.max_sge is %d",
-               dev->data->port_id, priv->sh->device_attr.orig_attr.max_sge);
+               dev->data->port_id, priv->sh->device_attr.max_sge);
        /* Allocate door-bell for types created with DevX. */
        if (tmpl->type != MLX5_RXQ_OBJ_TYPE_IBV) {
                struct mlx5_devx_dbr_page *dbr_page;
                int64_t dbr_offset;
 
-               dbr_offset = mlx5_get_dbr(dev, &dbr_page);
+               dbr_offset = mlx5_get_dbr(priv->sh->ctx, &priv->dbrpgs,
+                                         &dbr_page);
                if (dbr_offset < 0)
                        goto error;
                rxq_ctrl->dbr_offset = dbr_offset;
-               rxq_ctrl->dbr_umem_id = dbr_page->umem->umem_id;
+               rxq_ctrl->dbr_umem_id = mlx5_os_get_umem_id(dbr_page->umem);
                rxq_ctrl->dbr_umem_id_valid = 1;
                rxq_data->rq_db = (uint32_t *)((uintptr_t)dbr_page->dbrs +
                                               (uintptr_t)rxq_ctrl->dbr_offset);
@@ -2000,7 +1997,7 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
        tmpl->rxq.elts =
                (struct rte_mbuf *(*)[1 << tmpl->rxq.elts_n])(tmpl + 1);
 #ifndef RTE_ARCH_64
-       tmpl->rxq.uar_lock_cq = &priv->uar_lock_cq;
+       tmpl->rxq.uar_lock_cq = &priv->sh->uar_lock_cq;
 #endif
        tmpl->rxq.idx = idx;
        rte_atomic32_inc(&tmpl->refcnt);
@@ -2106,7 +2103,8 @@ mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
                rxq_ctrl->obj = NULL;
        if (rte_atomic32_dec_and_test(&rxq_ctrl->refcnt)) {
                if (rxq_ctrl->dbr_umem_id_valid)
-                       claim_zero(mlx5_release_dbr(dev, rxq_ctrl->dbr_umem_id,
+                       claim_zero(mlx5_release_dbr(&priv->dbrpgs,
+                                                   rxq_ctrl->dbr_umem_id,
                                                    rxq_ctrl->dbr_offset));
                if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
                        mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);