wq_attr->dbr_addr = rxq_ctrl->rq_dbr_offset;
wq_attr->dbr_umem_id = rxq_ctrl->rq_dbr_umem_id;
wq_attr->dbr_umem_valid = 1;
- wq_attr->wq_umem_id = rxq_ctrl->wq_umem->umem_id;
+ wq_attr->wq_umem_id = mlx5_os_get_umem_id(rxq_ctrl->wq_umem);
wq_attr->wq_umem_valid = 1;
}
DRV_LOG(ERR, "Failed to register umem for CQ.");
goto error;
}
- cq_attr.uar_page_id = priv->sh->devx_rx_uar->page_id;
- cq_attr.q_umem_id = rxq_ctrl->cq_umem->umem_id;
+ cq_attr.uar_page_id =
+ mlx5_os_get_devx_uar_page_id(priv->sh->devx_rx_uar);
+ cq_attr.q_umem_id = mlx5_os_get_umem_id(rxq_ctrl->cq_umem);
cq_attr.q_umem_valid = 1;
cq_attr.log_cq_size = log_cqe_n;
cq_attr.log_page_size = rte_log2_u32(page_size);
rte_errno = ENOMEM;
goto error;
}
- tmpl->fd = tmpl->ibv_channel->fd;
+ tmpl->fd = ((struct ibv_comp_channel *)
+ (tmpl->ibv_channel))->fd;
} else if (tmpl->type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ) {
int devx_ev_flag =
MLX5DV_DEVX_CREATE_EVENT_CHANNEL_FLAGS_OMIT_EV_DATA;
rte_errno);
goto error;
}
- tmpl->fd = tmpl->devx_channel->fd;
+ tmpl->fd =
+ mlx5_os_get_devx_channel_fd(tmpl->devx_channel);
}
}
if (mlx5_rxq_mprq_enabled(rxq_data))
rxq_data->cq_db =
(uint32_t *)((uintptr_t)dbr_page->dbrs +
(uintptr_t)rxq_ctrl->cq_dbr_offset);
- rxq_data->cq_uar = priv->sh->devx_rx_uar->base_addr;
+ rxq_data->cq_uar =
+ mlx5_os_get_devx_uar_base_addr(priv->sh->devx_rx_uar);
/* Create CQ using DevX API. */
tmpl->devx_cq = mlx5_devx_cq_new(dev, cqe_n, idx, tmpl);
if (!tmpl->devx_cq) {
(priv->sh->ctx,
&(struct ibv_rwq_ind_table_init_attr){
.log_ind_tbl_size = 0,
- .ind_tbl = &rxq->wq,
+ .ind_tbl = (struct ibv_wq **)&rxq->wq,
.comp_mask = 0,
});
if (!tmpl.ind_table) {