net/fm10k: use inclusive engineering terminology
[dpdk.git] / drivers / net / mlx5 / mlx5_rxq.c
index e6dc5ac..946f745 100644 (file)
@@ -1188,34 +1188,43 @@ mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
        if (rxq_obj->type == MLX5_RXQ_OBJ_TYPE_IBV) {
                ret = mlx5_glue->get_cq_event(rxq_obj->ibv_channel, &ev_cq,
                                              &ev_ctx);
-               if (ret || ev_cq != rxq_obj->ibv_cq) {
-                       rte_errno = EINVAL;
+               if (ret < 0 || ev_cq != rxq_obj->ibv_cq)
                        goto exit;
-               }
                mlx5_glue->ack_cq_events(rxq_obj->ibv_cq, 1);
        } else if (rxq_obj->type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ) {
 #ifdef HAVE_IBV_DEVX_EVENT
-               struct mlx5dv_devx_async_event_hdr *event_data = NULL;
+               union {
+                       struct mlx5dv_devx_async_event_hdr event_resp;
+                       uint8_t buf[sizeof(struct mlx5dv_devx_async_event_hdr)
+                                   + 128];
+               } out;
 
                ret = mlx5_glue->devx_get_event
-                               (rxq_obj->devx_channel, event_data,
-                                sizeof(struct mlx5dv_devx_async_event_hdr));
-               if (ret <= 0 || event_data->cookie !=
-                               (uint64_t)(uintptr_t)rxq_obj->devx_cq) {
-                       rte_errno = EINVAL;
+                               (rxq_obj->devx_channel, &out.event_resp,
+                                sizeof(out.buf));
+               if (ret < 0 || out.event_resp.cookie !=
+                               (uint64_t)(uintptr_t)rxq_obj->devx_cq)
                        goto exit;
-               }
 #endif /* HAVE_IBV_DEVX_EVENT */
        }
        rxq_data->cq_arm_sn++;
        mlx5_rxq_obj_release(rxq_obj);
        return 0;
 exit:
+       /**
+        * For ret < 0 save the errno (may be EAGAIN which means the get_event
+        * function was called before receiving one).
+        */
+       if (ret < 0)
+               rte_errno = errno;
+       else
+               rte_errno = EINVAL;
        ret = rte_errno; /* Save rte_errno before cleanup. */
        if (rxq_obj)
                mlx5_rxq_obj_release(rxq_obj);
-       DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
-               dev->data->port_id, rx_queue_id);
+       if (ret != EAGAIN)
+               DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
+                       dev->data->port_id, rx_queue_id);
        rte_errno = ret; /* Restore rte_errno. */
        return -rte_errno;
 }
@@ -1435,7 +1444,7 @@ mlx5_devx_wq_attr_fill(struct mlx5_priv *priv, struct mlx5_rxq_ctrl *rxq_ctrl,
        wq_attr->dbr_addr = rxq_ctrl->rq_dbr_offset;
        wq_attr->dbr_umem_id = rxq_ctrl->rq_dbr_umem_id;
        wq_attr->dbr_umem_valid = 1;
-       wq_attr->wq_umem_id = rxq_ctrl->wq_umem->umem_id;
+       wq_attr->wq_umem_id = mlx5_os_get_umem_id(rxq_ctrl->wq_umem);
        wq_attr->wq_umem_valid = 1;
 }
 
@@ -1611,8 +1620,9 @@ mlx5_devx_cq_new(struct rte_eth_dev *dev, unsigned int cqe_n, uint16_t idx,
                DRV_LOG(ERR, "Failed to register umem for CQ.");
                goto error;
        }
-       cq_attr.uar_page_id = priv->sh->devx_rx_uar->page_id;
-       cq_attr.q_umem_id = rxq_ctrl->cq_umem->umem_id;
+       cq_attr.uar_page_id =
+               mlx5_os_get_devx_uar_page_id(priv->sh->devx_rx_uar);
+       cq_attr.q_umem_id = mlx5_os_get_umem_id(rxq_ctrl->cq_umem);
        cq_attr.q_umem_valid = 1;
        cq_attr.log_cq_size = log_cqe_n;
        cq_attr.log_page_size = rte_log2_u32(page_size);
@@ -1641,6 +1651,8 @@ mlx5_devx_cq_new(struct rte_eth_dev *dev, unsigned int cqe_n, uint16_t idx,
        memset((void *)(uintptr_t)rxq_data->cqes, 0xFF, cq_size);
        return cq_obj;
 error:
+       if (cq_obj)
+               mlx5_devx_cmd_destroy(cq_obj);
        rxq_release_devx_cq_resources(rxq_ctrl);
        return NULL;
 }
@@ -1778,7 +1790,8 @@ mlx5_rxq_obj_new(struct rte_eth_dev *dev, uint16_t idx,
                                rte_errno = ENOMEM;
                                goto error;
                        }
-                       tmpl->fd = tmpl->ibv_channel->fd;
+                       tmpl->fd = ((struct ibv_comp_channel *)
+                                       (tmpl->ibv_channel))->fd;
                } else if (tmpl->type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ) {
                        int devx_ev_flag =
                          MLX5DV_DEVX_CREATE_EVENT_CHANNEL_FLAGS_OMIT_EV_DATA;
@@ -1794,7 +1807,8 @@ mlx5_rxq_obj_new(struct rte_eth_dev *dev, uint16_t idx,
                                        rte_errno);
                                goto error;
                        }
-                       tmpl->fd = tmpl->devx_channel->fd;
+                       tmpl->fd =
+                               mlx5_os_get_devx_channel_fd(tmpl->devx_channel);
                }
        }
        if (mlx5_rxq_mprq_enabled(rxq_data))
@@ -1886,7 +1900,8 @@ mlx5_rxq_obj_new(struct rte_eth_dev *dev, uint16_t idx,
                rxq_data->cq_db =
                        (uint32_t *)((uintptr_t)dbr_page->dbrs +
                                     (uintptr_t)rxq_ctrl->cq_dbr_offset);
-               rxq_data->cq_uar = priv->sh->devx_rx_uar->base_addr;
+               rxq_data->cq_uar =
+                       mlx5_os_get_devx_uar_base_addr(priv->sh->devx_rx_uar);
                /* Create CQ using DevX API. */
                tmpl->devx_cq = mlx5_devx_cq_new(dev, cqe_n, idx, tmpl);
                if (!tmpl->devx_cq) {
@@ -3285,7 +3300,7 @@ mlx5_ind_table_obj_drop_new(struct rte_eth_dev *dev)
                (priv->sh->ctx,
                 &(struct ibv_rwq_ind_table_init_attr){
                        .log_ind_tbl_size = 0,
-                       .ind_tbl = &rxq->wq,
+                       .ind_tbl = (struct ibv_wq **)&rxq->wq,
                        .comp_mask = 0,
                 });
        if (!tmpl.ind_table) {