net/i40e: support cloud filter with L4 port
[dpdk.git] / drivers / net / mlx5 / mlx5_rxq.c
index dda0073..b436f06 100644 (file)
@@ -34,6 +34,7 @@
 
 #include "mlx5_defs.h"
 #include "mlx5.h"
+#include "mlx5_common_os.h"
 #include "mlx5_rxtx.h"
 #include "mlx5_utils.h"
 #include "mlx5_autoconf.h"
@@ -107,7 +108,7 @@ inline int
 mlx5_mprq_enabled(struct rte_eth_dev *dev)
 {
        struct mlx5_priv *priv = dev->data->dev_private;
-       uint16_t i;
+       uint32_t i;
        uint16_t n = 0;
        uint16_t n_ibv = 0;
 
@@ -1413,7 +1414,8 @@ mlx5_rxq_obj_new(struct rte_eth_dev *dev, uint16_t idx,
                struct mlx5_devx_dbr_page *dbr_page;
                int64_t dbr_offset;
 
-               dbr_offset = mlx5_get_dbr(dev, &dbr_page);
+               dbr_offset = mlx5_get_dbr(priv->sh->ctx, &priv->dbrpgs,
+                                         &dbr_page);
                if (dbr_offset < 0)
                        goto error;
                rxq_ctrl->dbr_offset = dbr_offset;
@@ -2101,7 +2103,8 @@ mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
                rxq_ctrl->obj = NULL;
        if (rte_atomic32_dec_and_test(&rxq_ctrl->refcnt)) {
                if (rxq_ctrl->dbr_umem_id_valid)
-                       claim_zero(mlx5_release_dbr(dev, rxq_ctrl->dbr_umem_id,
+                       claim_zero(mlx5_release_dbr(&priv->dbrpgs,
+                                                   rxq_ctrl->dbr_umem_id,
                                                    rxq_ctrl->dbr_offset));
                if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
                        mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);