net/mlx5: add hardware checksum offload for tunnel packets

[dpdk.git] / drivers / net / mlx5 / mlx5_rxtx.h

diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 23a2548..4c1cdb9 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -249,12 +249,15 @@ struct txq {
        uint16_t elts_comp; /* Counter since last completion request. */
        uint16_t cq_ci; /* Consumer index for completion queue. */
        uint16_t wqe_ci; /* Consumer index for work queue. */
+       uint16_t wqe_pi; /* Producer index for work queue. */
        uint16_t elts_n:4; /* (*elts)[] length (in log2). */
        uint16_t cqe_n:4; /* Number of CQ elements (in log2). */
        uint16_t wqe_n:4; /* Number of of WQ elements (in log2). */
-       uint16_t bf_buf_size:4; /* Log2 Blueflame size. */
-       uint16_t bf_offset; /* Blueflame offset. */
        uint16_t max_inline; /* Multiple of RTE_CACHE_LINE_SIZE to inline. */
+       uint16_t inline_en:1; /* When set inline is enabled. */
+       uint16_t tso_en:1; /* When set hardware TSO is enabled. */
+       uint16_t tunnel_en:1;
+       /* When set TX offload for tunneled packets are supported. */
        uint32_t qp_num_8s; /* QP number shifted by 8. */
        volatile struct mlx5_cqe (*cqes)[]; /* Completion queue. */
        volatile void *wqes; /* Work queue (use volatile to write into). */
@@ -324,6 +327,8 @@ uint16_t mlx5_tx_burst_mpw_inline(void *, struct rte_mbuf **, uint16_t);
 uint16_t mlx5_rx_burst(void *, struct rte_mbuf **, uint16_t);
 uint16_t removed_tx_burst(void *, struct rte_mbuf **, uint16_t);
 uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
+int mlx5_rx_descriptor_status(void *, uint16_t);
+int mlx5_tx_descriptor_status(void *, uint16_t);
 
 /* mlx5_mr.c */