net/hns3: fix queue state when concurrent with reset

[dpdk.git] / drivers / net / mlx5 / mlx5_rxtx.h

diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 1e9345a..4f0fda0 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -126,7 +126,7 @@ struct mlx5_rxq_data {
        unsigned int strd_scatter_en:1; /* Scattered packets from a stride. */
        unsigned int lro:1; /* Enable LRO. */
        unsigned int dynf_meta:1; /* Dynamic metadata is configured. */
-       unsigned int mcqe_format:3; /* Dynamic metadata is configured. */
+       unsigned int mcqe_format:3; /* CQE compression format. */
        volatile uint32_t *rq_db;
        volatile uint32_t *cq_db;
        uint16_t port_id;
@@ -168,6 +168,7 @@ struct mlx5_rxq_data {
        uint64_t timestamp_rx_flag; /* Dynamic mbuf flag for timestamp. */
        uint64_t flow_meta_mask;
        int32_t flow_meta_offset;
+       uint32_t flow_meta_port_mask;
        uint32_t rxseg_n; /* Number of split segment descriptions. */
        struct mlx5_eth_rxseg rxseg[MLX5_MAX_RXQ_NSEG];
        /* Buffer split segment descriptions - sizes, offsets, pools. */
@@ -193,14 +194,6 @@ struct mlx5_rxq_ctrl {
        uint32_t flow_tunnels_n[MLX5_FLOW_TUNNEL]; /* Tunnels counters. */
        uint32_t wqn; /* WQ number. */
        uint16_t dump_file_n; /* Number of dump files. */
-       struct mlx5_devx_dbr_page *rq_dbrec_page;
-       uint64_t rq_dbr_offset;
-       /* Storing RQ door-bell information, needed when freeing door-bell. */
-       struct mlx5_devx_dbr_page *cq_dbrec_page;
-       uint64_t cq_dbr_offset;
-       /* Storing CQ door-bell information, needed when freeing door-bell. */
-       void *wq_umem; /* WQ buffer registration info. */
-       void *cq_umem; /* CQ buffer registration info. */
        struct rte_eth_hairpin_conf hairpin_conf; /* Hairpin configuration. */
        uint32_t hairpin_status; /* Hairpin binding status. */
 };
@@ -217,6 +210,7 @@ struct mlx5_txq_local {
        uint16_t wqe_free; /* available wqe remain. */
        uint16_t mbuf_off; /* data offset in current mbuf. */
        uint16_t mbuf_nseg; /* number of remaining mbuf. */
+       uint16_t mbuf_free; /* number of inline mbufs to free. */
 };
 
 /* TX queue descriptor. */
@@ -250,6 +244,7 @@ struct mlx5_txq_data {
        uint16_t vlan_en:1; /* VLAN insertion in WQE is supported. */
        uint16_t db_nc:1; /* Doorbell mapped to non-cached region. */
        uint16_t db_heu:1; /* Doorbell heuristic write barrier. */
+       uint16_t fast_free:1; /* mbuf fast free on Tx is enabled. */
        uint16_t inlen_send; /* Ordinary send data inline size. */
        uint16_t inlen_empw; /* eMPW max packet size to inline. */
        uint16_t inlen_mode; /* Minimal data length to inline. */