net/ring: release port upon close

[dpdk.git] / drivers / net / mlx5 / mlx5_rxtx.h

diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index b092e43..6876c1b 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -155,40 +155,12 @@ struct mlx5_rxq_data {
        int32_t flow_meta_offset;
 } __rte_cache_aligned;
 
-enum mlx5_rxq_obj_type {
-       MLX5_RXQ_OBJ_TYPE_IBV,          /* mlx5_rxq_obj with ibv_wq. */
-       MLX5_RXQ_OBJ_TYPE_DEVX_RQ,      /* mlx5_rxq_obj with mlx5_devx_rq. */
-       MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN,
-       /* mlx5_rxq_obj with mlx5_devx_rq and hairpin support. */
-};
-
 enum mlx5_rxq_type {
        MLX5_RXQ_TYPE_STANDARD, /* Standard Rx queue. */
        MLX5_RXQ_TYPE_HAIRPIN, /* Hairpin Rx queue. */
        MLX5_RXQ_TYPE_UNDEFINED,
 };
 
-/* Verbs/DevX Rx queue elements. */
-struct mlx5_rxq_obj {
-       LIST_ENTRY(mlx5_rxq_obj) next; /* Pointer to the next element. */
-       struct mlx5_rxq_ctrl *rxq_ctrl; /* Back pointer to parent. */
-       enum mlx5_rxq_obj_type type;
-       int fd; /* File descriptor for event channel */
-       RTE_STD_C11
-       union {
-               struct {
-                       void *wq; /* Work Queue. */
-                       void *ibv_cq; /* Completion Queue. */
-                       void *ibv_channel;
-               };
-               struct {
-                       struct mlx5_devx_obj *rq; /* DevX Rx Queue object. */
-                       struct mlx5_devx_obj *devx_cq; /* DevX CQ object. */
-                       void *devx_channel;
-               };
-       };
-};
-
 /* RX queue control descriptor. */
 struct mlx5_rxq_ctrl {
        struct mlx5_rxq_data rxq; /* Data path structure. */
@@ -203,10 +175,10 @@ struct mlx5_rxq_ctrl {
        uint32_t flow_tunnels_n[MLX5_FLOW_TUNNEL]; /* Tunnels counters. */
        uint32_t wqn; /* WQ number. */
        uint16_t dump_file_n; /* Number of dump files. */
-       uint32_t rq_dbr_umem_id;
+       struct mlx5_devx_dbr_page *rq_dbrec_page;
        uint64_t rq_dbr_offset;
        /* Storing RQ door-bell information, needed when freeing door-bell. */
-       uint32_t cq_dbr_umem_id;
+       struct mlx5_devx_dbr_page *cq_dbrec_page;
        uint64_t cq_dbr_offset;
        /* Storing CQ door-bell information, needed when freeing door-bell. */
        void *wq_umem; /* WQ buffer registration info. */
@@ -214,43 +186,6 @@ struct mlx5_rxq_ctrl {
        struct rte_eth_hairpin_conf hairpin_conf; /* Hairpin configuration. */
 };
 
-enum mlx5_ind_tbl_type {
-       MLX5_IND_TBL_TYPE_IBV,
-       MLX5_IND_TBL_TYPE_DEVX,
-};
-
-/* Indirection table. */
-struct mlx5_ind_table_obj {
-       LIST_ENTRY(mlx5_ind_table_obj) next; /* Pointer to the next element. */
-       rte_atomic32_t refcnt; /* Reference counter. */
-       enum mlx5_ind_tbl_type type;
-       RTE_STD_C11
-       union {
-               void *ind_table; /**< Indirection table. */
-               struct mlx5_devx_obj *rqt; /* DevX RQT object. */
-       };
-       uint32_t queues_n; /**< Number of queues in the list. */
-       uint16_t queues[]; /**< Queue list. */
-};
-
-/* Hash Rx queue. */
-struct mlx5_hrxq {
-       ILIST_ENTRY(uint32_t)next; /* Index to the next element. */
-       rte_atomic32_t refcnt; /* Reference counter. */
-       struct mlx5_ind_table_obj *ind_table; /* Indirection table. */
-       RTE_STD_C11
-       union {
-               void *qp; /* Verbs queue pair. */
-               struct mlx5_devx_obj *tir; /* DevX TIR object. */
-       };
-#ifdef HAVE_IBV_FLOW_DV_SUPPORT
-       void *action; /* DV QP action pointer. */
-#endif
-       uint64_t hash_fields; /* Verbs Hash fields. */
-       uint32_t rss_key_len; /* Hash key length in bytes. */
-       uint8_t rss_key[]; /* Hash key. */
-};
-
 /* TX queue send local data. */
 __extension__
 struct mlx5_txq_local {
@@ -399,6 +334,7 @@ extern uint8_t rss_hash_default_key[];
 int mlx5_check_mprq_support(struct rte_eth_dev *dev);
 int mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq);
 int mlx5_mprq_enabled(struct rte_eth_dev *dev);
+unsigned int mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data);
 int mlx5_mprq_free_mp(struct rte_eth_dev *dev);
 int mlx5_mprq_alloc_mp(struct rte_eth_dev *dev);
 int mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id);
@@ -416,8 +352,6 @@ int mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev);
 void mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev);
 int mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 int mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id);
-struct mlx5_rxq_obj *mlx5_rxq_obj_new(struct rte_eth_dev *dev, uint16_t idx,
-                                     enum mlx5_rxq_obj_type type);
 int mlx5_rxq_obj_verify(struct rte_eth_dev *dev);
 struct mlx5_rxq_ctrl *mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx,
                                   uint16_t desc, unsigned int socket,
@@ -431,6 +365,11 @@ int mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx);
 int mlx5_rxq_verify(struct rte_eth_dev *dev);
 int rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl);
 int mlx5_ind_table_obj_verify(struct rte_eth_dev *dev);
+struct mlx5_ind_table_obj *mlx5_ind_table_obj_get(struct rte_eth_dev *dev,
+                                                 const uint16_t *queues,
+                                                 uint32_t queues_n);
+int mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
+                              struct mlx5_ind_table_obj *ind_tbl);
 uint32_t mlx5_hrxq_new(struct rte_eth_dev *dev,
                       const uint8_t *rss_key, uint32_t rss_key_len,
                       uint64_t hash_fields,
@@ -443,8 +382,8 @@ uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,
 int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hxrq_idx);
 int mlx5_hrxq_verify(struct rte_eth_dev *dev);
 enum mlx5_rxq_type mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx);
-struct mlx5_hrxq *mlx5_hrxq_drop_new(struct rte_eth_dev *dev);
-void mlx5_hrxq_drop_release(struct rte_eth_dev *dev);
+struct mlx5_hrxq *mlx5_drop_action_create(struct rte_eth_dev *dev);
+void mlx5_drop_action_destroy(struct rte_eth_dev *dev);
 uint64_t mlx5_get_rx_port_offloads(void);
 uint64_t mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev);
 void mlx5_rxq_timestamp_set(struct rte_eth_dev *dev);
@@ -688,7 +627,7 @@ mlx5_tx_dbrec_cond_wmb(struct mlx5_txq_data *txq, volatile struct mlx5_wqe *wqe,
        uint64_t *dst = MLX5_TX_BFREG(txq);
        volatile uint64_t *src = ((volatile uint64_t *)wqe);
 
-       rte_cio_wmb();
+       rte_io_wmb();
        *txq->qp_db = rte_cpu_to_be_32(txq->wqe_ci);
        /* Ensure ordering between DB record and BF copy. */
        rte_wmb();